I hooked up the ADC sync cables coming from the EVT Module in the LHRS to ROCs 1-5. The EVT Module's output is enabled by the TDC stop coming from each HRS. Currently the TDC stop from each HRS is OR'd in a Lecroy 428F Linear Fan-in/Fan-out. I had to use this module to produce an output of the required width (~200ns) going into the EVT Module. Now the SYNC signal is produced when either DAQ is running.
I've attached sample images of the SYNC signals (for testing, I mapped the sync signals to s1 channels). The plot for the RHRS is curious, as it produces two lines (not sure if this is just because of the higher resolution in the ADC, both are currently in 13bit mode on the RHRS). Alexander since you have previous knowledge of the system, could you verify that everything is working? Thanks.
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