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    User name V. Sulkosky

    Log entry time 15:17:09 on July 31, 2008

    Entry number 241966

    Followups:

    keyword=A1 Patch Panel, ADC and TDC Left HRS Maps

    The cabling and electronics for the A1 aerogel has been verified on the
    Left HRS with the help of Youcai Wang. The cables and patch panel to the
    ADC's have been tested with a pulser for all 24 A1 channels and were
    found satisfactory.

    Here is the Patch Panel, ADC and TDC map for A1 (left PMTs in ALFRED B
    and right PMTs in ALFRED C):

    Patch Panel A1 Cable ADC TDC
    Channel ROC/Slot/Channel ROC/Slot/Channel
    ---------------------------------------------------------------------
    B1 L1 3/23/32 4/13/32
    B2 L2 3/23/33 4/13/33
    B3 L3 3/23/34 4/13/34
    B4 L4 3/23/35 4/13/35
    B5 L5 3/23/36 4/13/36
    B6 L6 3/23/37 4/13/37
    B7 L7 3/23/38 4/13/38
    B8 L8 3/23/39 4/13/39
    B9 L9 3/23/40 4/13/40
    B10 L10 3/23/41 4/13/41
    B11 L11 3/23/42 4/13/42
    B12 L12 3/23/43 4/13/43
    ---------------------------------------------------------------------
    C1 R1 3/23/48 4/13/64
    C2 R2 3/23/49 4/13/65
    C3 R3 3/23/50 4/13/66
    C4 R4 3/23/51 4/13/67
    C5 R5 3/23/52 4/13/68
    C6 R6 3/23/53 4/13/69
    C7 R7 3/23/54 4/13/70
    C8 R8 3/23/55 4/13/71
    C9 R9 3/23/56 4/13/72
    C10 R10 3/23/57 4/13/73
    C11 R11 3/23/58 4/13/74
    C12 R12 3/23/59 4/13/75

    The A1 channels were plugged into the TS scaler module in slot # 11.
    The left channels 1-12 are in the bottom input and the right channels
    1-12 are in the top ECL input.

    A copy of this log entry has been emailed to: ycwang@jlab.org,camsonne@jlab.org,kalyan@jlab.org