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    User name R. Michaels

    Log entry time 16:51:04 on April 3,2009

    Entry number 266665

    Followups:

    keyword=LeftHRS "working" (sorta)

    Fixed the gates on roc3, roc4.

    First, I had been given L1A after a module that made a narrow
    (50 nsec) pulse. The RT doesn't like this, so with Miha's permission
    I took the "real" L1A.

    Next, there was a problem in sfi4.crl: index bug. After fixing
    this the modslot[] was 9,13,21 which was intended.

    But then slot 9 had no gate -- it was programmed to have gates on
    frontend but these don't exist, apparently. (there is a cable
    there with the curious label "scaler clock"). So I programmed it
    to have backplane gates and now ... everything works.

    All ROCs have gates in LeftHRS config, even the Bbite ones.

    ------------------------

    Different problem: At first I could not download TS11.
    This was apparently related to the symptom that if I type
    'cd "/adaqfs/halla/a-onl/crl" ' and then type 'ls' (minus
    the single quotes) at vxWorks, it gave an error ~90% of the
    time. I narrowed this down to a dozen lines in the boot script.
    Now using x.boot (normal is vme_left.boot). If anyone figures
    this out you get a prize. I'll try later and to find out
    what causes this. At the moment TS11 downloads but with x.boot ...
    we're missing stuff like EDTM and scaler servers.