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    User name R. Michaels

    Log entry time 15:56:56 on February10,2011

    Entry number 346297

    keyword=further DAQ changes

    Some more changes to the DAQ

    1. Modified portalex so that ROC4 is in the right place
    (hatsv4 port 8).

    2. Implemented the usual scripts for CODA. They must be
    written as script& with the & at the end. This allows
    rcgui to not freeze up on state transitions.

    Learned two other things about scripts and CODA 2.6.1 which I've
    reported to the DAQ group.

    a) If you have a mistaken script tied to a transition of, say, ROC3,
    then fix this and tie to ROC1, the old mistake is not deleted.
    One must delete the rdf files in the COOL directory. I.e., it keeps
    old baggage. (I guess when they get rid of MSQL this will not be
    an issue.)

    b) It appears one cannot call more than one script per component
    per state transition. No big deal, I combined the scripts for
    EB end, called end_all.

    3. Problem noted: the start-run and end-run scripts run, but
    very slowly. For example, I had to turn off these "TURNON" flags
    in epicsRunStart

    TURNON8=0
    TURNON21RS2=0

    or else the script took FOREVER. Lots of reasons why, like
    undefined variables, changes in EPICS, etc. Obviously we need
    to assign a caretaker for these scripts for SRC. Vince and I
    agreed to let Larry take a look. See ~a-onl/scripts/README.

    4. Modified the pedrun config:

    a) ROC1,2,3,4 to have no pedestal suppression (for obvious reasons,
    I hope) and the EB calls goped at the end of run. Goped is linked
    to the 2-arm version.

    b) pedrun uses a datafile /adaql2/data4/e07006_ped_NNN.dat.0 where
    NNN = run number. For historical reasons, need "ped" in filename.
    I don't know if this affects the Bigbite scheme. Will ask Larry
    to check.

    c) Prescale factors are ~/prescale/prescale_pulser.dat and nobody
    should touch this.

    However ... pedrun does not work on R-HRS because for T8 there is
    no gate. There must be a wrong assumption put into the RT circuit.
    I will check it later. Concept is: for *every* L1A there is a
    gate, no matter what.