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    User name Chao

    Log entry time 18:06:57 on March 20, 2012

    Entry number 367217

    This entry is a followup to: 367191

    keyword=Left arm fast clock problem is fixed

    We checked the signal. The scaler is using a bad channel to read fast clock. Fortunately, we have 2 channel of fast clock in left arm gated scaler (The other one is T7). So the simplest way to solve this problem is to modify the SIS3801 control package, and make it reading timestamp from ch6(T7). Now the fast clock signal looks good in scaler ring buffer.



    A copy of this log entry has been emailed to: kalyan,tbadman



    Figure 1