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    User name R. Michaels

    Log entry time 13:40:51 on June 2,2000

    Entry number 42876

    keyword=trigger timing fixes

    We solved the problem of the doubling of self-timing peaks
    by increasing the window on the retiming module 35 nsec.
    The max increase allowable was 70 nsec, at which point one
    starts losing fastbus gates. As thing stood previously, when
    the E-arm slid earlier relative to the H-arm, at about -40 nsec
    it started creating forced timing. So we needed a 20 nsec adjustment
    to this window (and did 35). After the E-arm slides so early that
    that H-arm defines the trigger timing, it no longer is an issue,
    since then the L1A-to-retiming signal time difference becomes fixed.
    Refer to the paper log book page 171