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User name atrig
Log entry time 17:56:06 on February 17, 2001
Entry number 56283
keyword=Trigger-Download
Download of trigger at Sat Feb 17 17:56:05 EST 2001
Database directory = /adaqfs/halla/atrig/trigger
Momentum of Left Spectrometer 1740.00 MeV/c
Momentum of Right Spectrometer 1438.00 MeV/c
Delay assumed 11.2 nsec
PID of Left Spectrometer:
Proton
PID of Right Spectrometer:
Pion
-----------------------
Detailed Dump of Data:
0) s12L_l_disc LeCroy4413
crate: 1 slot: 2 -- display-X 1 -Y 1
Descriminator setting 45 mV
Module state: none
-----------------------
1) s12L_l_delay LeCroy4418/16
crate: 1 slot: 4 -- display-X 2 -Y 1
Delay settings (in units of leastcount):
[0]: 0 [1]: 11 [2]: 0 [3]: 11 [4]: 11 [5]: 11 [6]: 11 [7]: 11
[8]: 0 [9]: 11 [10]: 1 [11]: 11 [12]: 11 [13]: 11 [14]: 11 [15]: 11
Module state: none
-----------------------
2) s12L_logic LeCroy4516
crate: 1 slot: 6 -- display-X 3 -Y 2
Module state: and-or
-----------------------
3) s12L_r_disc LeCroy4413
crate: 1 slot: 14 -- display-X 1 -Y 3
Descriminator setting 45 mV
Module state: none
-----------------------
4) s12L_r_delay LeCroy4418/32
crate: 1 slot: 12 -- display-X 2 -Y 3
Delay settings (in units of leastcount):
[0]: 0 [1]: 5 [2]: 1 [3]: 5 [4]: 5 [5]: 5 [6]: 5 [7]: 5
[8]: 0 [9]: 5 [10]: 0 [11]: 5 [12]: 5 [13]: 5 [14]: 5 [15]: 5
Module state: none
-----------------------
5) s12L_delay LeCroy4418/16
crate: 1 slot: 8 -- display-X 4 -Y 2
Delay settings (in units of leastcount):
[0]: 0 [1]: 0 [2]: 0 [3]: 0 [4]: 0 [5]: 0 [6]: 0 [7]: 0
[8]: 0 [9]: 0 [10]: 0 [11]: 0 [12]: 0 [13]: 0 [14]: 0 [15]: 0
Module state: none
-----------------------
6) s12L_mlu LeCroy2373
crate: 1 slot: 10 -- display-X 5 -Y 2
Module state: pulse
MLU file 1 mlu1_left.data
-----------------------
7) stbL_delay1 LeCroy4418/16
crate: 1 slot: 16 -- display-X 3 -Y 3
Delay settings (in units of leastcount):
[0]: 14 [1]: 14 [2]: 14 [3]: 14 [4]: 14 [5]: 14 [6]: 0 [7]: 0
[8]: 0 [9]: 0 [10]: 0 [11]: 0 [12]: 0 [13]: 0 [14]: 0 [15]: 0
Module state: none
-----------------------
8) stbL_delay2 LeCroy4418/16
crate: 1 slot: 17 -- display-X 4 -Y 3
Delay settings (in units of leastcount):
[0]: 11 [1]: 11 [2]: 11 [3]: 11 [4]: 11 [5]: 11 [6]: 3 [7]: 3
[8]: 3 [9]: 3 [10]: 3 [11]: 3 [12]: 3 [13]: 3 [14]: 3 [15]: 3
Module state: none
-----------------------
9) stbL_logic LeCroy4516
crate: 1 slot: 18 -- display-X 5 -Y 3
Module state: or-or
-----------------------
10) retimeL_logic LeCroy4516
crate: 1 slot: 19 -- display-X 6 -Y 3
Module state: none
-----------------------
11) cherL_disc LeCroy4413
crate: 2 slot: 2 -- display-X 1 -Y 5
Descriminator setting 30 mV
Module state: none
-----------------------
12) cherL_delay LeCroy4418/16
crate: 2 slot: 4 -- display-X 2 -Y 5
Delay settings (in units of leastcount):
[0]: 0 [1]: 0 [2]: 0 [3]: 0 [4]: 0 [5]: 0 [6]: 0 [7]: 0
[8]: 0 [9]: 0 [10]: 0 [11]: 0 [12]: 0 [13]: 0 [14]: 0 [15]: 0
Module state: none
-----------------------
13) coinL_mlu LeCroy2373
crate: 2 slot: 7 -- display-X 4 -Y 7
Module state: tran
MLU file 1 mlu2_t4.data
-----------------------
14) LR_delay LeCroy4418/16
crate: 2 slot: 9 -- display-X 5 -Y 7
Delay settings (in units of leastcount):
[0]: 0 [1]: 15 [2]: 15 [3]: 7 [4]: 0 [5]: 0 [6]: 0 [7]: 0
[8]: 0 [9]: 0 [10]: 0 [11]: 0 [12]: 0 [13]: 0 [14]: 0 [15]: 0
Module state: none
-----------------------
15) L_delay_1 LeCroy4518/300
crate: 2 slot: 10 -- display-X 6 -Y 7
Delay settings (in units of leastcount):
[0]: 11 [1]: 9 [2]: 1 [3]: 0 [4]: 11 [5]: 0 [6]: 0 [7]: 0
[8]: 0 [9]: 0 [10]: 0 [11]: 0 [12]: 0 [13]: 0 [14]: 0 [15]: 0
Module state: none
-----------------------
16) LR_coin_logic LeCroy4516
crate: 2 slot: 11 -- display-X 7 -Y 7
Module state: and-or
-----------------------
17) Ltrig4_delay LeCroy4418/16
crate: 2 slot: 13 -- display-X 5 -Y 9
Delay settings (in units of leastcount):
[0]: 3 [1]: 14 [2]: 14 [3]: 14 [4]: 14 [5]: 14 [6]: 14 [7]: 14
[8]: 14 [9]: 14 [10]: 0 [11]: 0 [12]: 0 [13]: 0 [14]: 0 [15]: 0
Module state: none
-----------------------
18) L_delay_2 LeCroy4518/300
crate: 2 slot: 14 -- display-X 8 -Y 7
Delay settings (in units of leastcount):
[0]: 1 [1]: 6 [2]: 8 [3]: 8 [4]: 13 [5]: 3 [6]: 0 [7]: 0
[8]: 0 [9]: 0 [10]: 0 [11]: 0 [12]: 0 [13]: 0 [14]: 0 [15]: 0
Module state: none
-----------------------
19) aroL_l_disc LeCroy4413
crate: 1 slot: 22 -- display-X 1 -Y 9
Descriminator setting 60 mV
Module state: none
-----------------------
20) aroL_l_delay LeCroy4418/16
crate: 1 slot: 23 -- display-X 2 -Y 9
Delay settings (in units of leastcount):
[0]: 0 [1]: 0 [2]: 0 [3]: 0 [4]: 0 [5]: 0 [6]: 0 [7]: 0
[8]: 0 [9]: 0 [10]: 0 [11]: 0 [12]: 0 [13]: 0 [14]: 0 [15]: 0
Module state: none
-----------------------
21) aroL_r_disc LeCroy4413
crate: 2 slot: 22 -- display-X 1 -Y 10
Descriminator setting 60 mV
Module state: none
-----------------------
22) aroL_r_delay LeCroy4418/16
crate: 2 slot: 23 -- display-X 2 -Y 10
Delay settings (in units of leastcount):
[0]: 0 [1]: 0 [2]: 0 [3]: 0 [4]: 0 [5]: 0 [6]: 0 [7]: 0
[8]: 0 [9]: 0 [10]: 0 [11]: 0 [12]: 0 [13]: 0 [14]: 0 [15]: 0
Module state: none
-----------------------
0) s12R_l_disc LeCroy4413
crate: 1 slot: 2 -- display-X 1 -Y 1
Descriminator setting 45 mV
Module state: none
-----------------------
1) s12R_l_delay LeCroy4418/16
crate: 1 slot: 4 -- display-X 2 -Y 1
Delay settings (in units of leastcount):
[0]: 2 [1]: 11 [2]: 2 [3]: 11 [4]: 11 [5]: 11 [6]: 11 [7]: 11
[8]: 2 [9]: 11 [10]: 0 [11]: 0 [12]: 3 [13]: 9 [14]: 9 [15]: 9
Module state: none
-----------------------
2) s12R_logic LeCroy4516
crate: 1 slot: 6 -- display-X 3 -Y 2
Module state: and-or
-----------------------
3) s12R_r_disc LeCroy4413
crate: 1 slot: 14 -- display-X 1 -Y 3
Descriminator setting 45 mV
Module state: none
-----------------------
4) s12R_r_delay LeCroy4418/32
crate: 1 slot: 12 -- display-X 2 -Y 3
Delay settings (in units of leastcount):
[0]: 2 [1]: 6 [2]: 2 [3]: 7 [4]: 6 [5]: 6 [6]: 6 [7]: 6
[8]: 2 [9]: 7 [10]: 2 [11]: 7 [12]: 6 [13]: 7 [14]: 6 [15]: 6
Module state: none
-----------------------
5) s12R_delay LeCroy4418/16
crate: 1 slot: 8 -- display-X 4 -Y 2
Delay settings (in units of leastcount):
[0]: 0 [1]: 0 [2]: 0 [3]: 0 [4]: 0 [5]: 0 [6]: 0 [7]: 0
[8]: 0 [9]: 0 [10]: 0 [11]: 0 [12]: 0 [13]: 0 [14]: 0 [15]: 0
Module state: none
-----------------------
6) s12R_mlu LeCroy2373
crate: 1 slot: 10 -- display-X 5 -Y 2
Module state: pulse
MLU file 1 mlu1_right.data
-----------------------
7) stbR_delay1 LeCroy4418/16
crate: 1 slot: 16 -- display-X 3 -Y 3
Delay settings (in units of leastcount):
[0]: 14 [1]: 14 [2]: 14 [3]: 14 [4]: 14 [5]: 14 [6]: 6 [7]: 6
[8]: 6 [9]: 6 [10]: 6 [11]: 6 [12]: 6 [13]: 6 [14]: 6 [15]: 6
Module state: none
-----------------------
8) stbR_delay2 LeCroy4418/16
crate: 1 slot: 18 -- display-X 4 -Y 3
Delay settings (in units of leastcount):
[0]: 14 [1]: 14 [2]: 14 [3]: 14 [4]: 14 [5]: 14 [6]: 0 [7]: 0
[8]: 0 [9]: 0 [10]: 0 [11]: 0 [12]: 0 [13]: 0 [14]: 0 [15]: 0
Module state: none
-----------------------
9) stbR_logic LeCroy4516
crate: 1 slot: 20 -- display-X 5 -Y 3
Module state: or-or
-----------------------
10) cherR_disc LeCroy4413
crate: 2 slot: 2 -- display-X 1 -Y 5
Descriminator setting 30 mV
Module state: none
-----------------------
11) cherR_delay LeCroy4418/16
crate: 2 slot: 4 -- display-X 2 -Y 5
Delay settings (in units of leastcount):
[0]: 0 [1]: 0 [2]: 0 [3]: 0 [4]: 0 [5]: 0 [6]: 0 [7]: 0
[8]: 0 [9]: 0 [10]: 0 [11]: 0 [12]: 0 [13]: 0 [14]: 0 [15]: 0
Module state: none
-----------------------
12) coinR_mlu LeCroy2373
crate: 2 slot: 8 -- display-X 5 -Y 7
Module state: tran
MLU file 1 mlu2_t2.data
-----------------------
13) trigR_delay1 LeCroy4418/16
crate: 2 slot: 10 -- display-X 4 -Y 7
Delay settings (in units of leastcount):
[0]: 0 [1]: 5 [2]: 10 [3]: 0 [4]: 0 [5]: 0 [6]: 0 [7]: 0
[8]: 0 [9]: 0 [10]: 0 [11]: 0 [12]: 0 [13]: 0 [14]: 0 [15]: 0
Module state: none
-----------------------
14) retimeR_delay1 LeCroy4418/16
crate: 2 slot: 12 -- display-X 3 -Y 8
Delay settings (in units of leastcount):
[0]: 14 [1]: 13 [2]: 13 [3]: 13 [4]: 13 [5]: 8 [6]: 0 [7]: 0
[8]: 0 [9]: 0 [10]: 0 [11]: 0 [12]: 0 [13]: 0 [14]: 0 [15]: 0
Module state: none
-----------------------
15) trigR_delay2 LeCroy4418/16
crate: 2 slot: 13 -- display-X 4 -Y 8
Delay settings (in units of leastcount):
[0]: 0 [1]: 0 [2]: 0 [3]: 0 [4]: 0 [5]: 0 [6]: 0 [7]: 0
[8]: 0 [9]: 0 [10]: 0 [11]: 0 [12]: 0 [13]: 0 [14]: 0 [15]: 0
Module state: none
-----------------------
16) trigR_delay3 LeCroy4518/300
crate: 2 slot: 15 -- display-X 5 -Y 8
Delay settings (in units of leastcount):
[0]: 4 [1]: 0 [2]: 1 [3]: 0 [4]: 9 [5]: 14 [6]: 0 [7]: 6
[8]: 15 [9]: 5 [10]: 11 [11]: 5 [12]: 0 [13]: 0 [14]: 0 [15]: 0
Module state: none
-----------------------
17) RL_coin_logic LeCroy4516
crate: 2 slot: 16 -- display-X 6 -Y 8
Module state: and-or
-----------------------
18) shmult_disc LeCroy4413
crate: 2 slot: 14 -- display-X 1 -Y 7
Descriminator setting 60 mV
Module state: none
-----------------------
19) prshwr_disc LeCroy4413
crate: 2 slot: 21 -- display-X 1 -Y 6
Descriminator setting 60 mV
Module state: none
-----------------------
20) aroR_l_disc LeCroy4413
crate: 1 slot: 22 -- display-X 1 -Y 9
Descriminator setting 60 mV
Module state: none
-----------------------
21) aroR_l_delay LeCroy4418/16
crate: 1 slot: 23 -- display-X 2 -Y 9
Delay settings (in units of leastcount):
[0]: 0 [1]: 0 [2]: 0 [3]: 0 [4]: 0 [5]: 0 [6]: 0 [7]: 0
[8]: 0 [9]: 0 [10]: 0 [11]: 0 [12]: 0 [13]: 0 [14]: 0 [15]: 0
Module state: none
-----------------------
22) aroR_r_disc LeCroy4413
crate: 2 slot: 22 -- display-X 1 -Y 10
Descriminator setting 60 mV
Module state: none
-----------------------
23) aroR_r_delay LeCroy4418/16
crate: 2 slot: 23 -- display-X 2 -Y 10
Delay settings (in units of leastcount):
[0]: 0 [1]: 0 [2]: 0 [3]: 0 [4]: 0 [5]: 0 [6]: 0 [7]: 0
[8]: 0 [9]: 0 [10]: 0 [11]: 0 [12]: 0 [13]: 0 [14]: 0 [15]: 0
Module state: none
-----------------------