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    User name R. Michaels

    Log entry time 11:36:19 on January12,2002

    Entry number 80143

    keyword=ADCs to check synch

    In fastbus ROCs 2, 4, and 14 there is an ADC that receives a signal
    which ramps on every event, and resets periodically (triangle wave).
    This is one possible check of synchronization. The plot shows the 2
    possible correlations. The signal in ROC4 is still a bit noisy, hence the
    vertical smearing in the top plot. This from run 1427. The channels are:
    ROC.............SLOT............CHAN (starting at 0)
    ....2.................24..................48
    ....4.................17..................48
    ...14......6th word after the header '0xfadc1182'


    FIGURE 1