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    User name R. Michaels

    Log entry time 19:35:38 on February 24, 2006

    Entry number 163568

    This entry is a followup to: 163535

    keyword=front panel FB voltages are not accurate

    Jack Segal has pointed out that the front panel voltages on the fastbus crate (ROC24) are not accurate. I agree 1.7 V looks bad, but ask him -- the voltages measured with a hand DVM are typically different and more accurate. So maybe you had a bad TDC module (doubtful), but I am rather sure that the printout listed in halog 163524 whereby slot 14 was complaining during prestart were due to erroneously addressing a TDC as if it were an ADC for pedestal suppression. If you have a bad module, running fastbus test code should prove it with fairly high reliability.

    A copy of this log entry has been emailed to: camsonne@jlab.org