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    User name sawatzky

    Log entry time 03:29:37 on February 25, 2006

    Entry number 163689

    Followups:

    keyword=Problem with F1 TDC in slot 13

    We had an issue with ROC25 (genvme1) appearing to become unresponsive
    after a reboot (no response to hitting return on the 'telnet genps1 2006'
    console).

    Rebooting the crate would get through all of the initialization stuff OK
    and then 'stall' after the following text (copied from the console):

    STATUS for TDC in slot 13 at base address 0xfac07000
    --------------------------------------------------
    Firmware Revsion/ID = 0xf1e1
    Alternate VME Addressing: Multiblock Enabled
    A32 Enabled at VME base 0x09c00000 or CPU addr 0x21c00000
    Muliblock VME Address Range 0x0a400000 - 0x0b400000

    Configuration:
    Control Inputs from Front Panel
    Internal Clock ON
    Use INTERNAL Clock
    Bus Error ENABLED
    MultiBlock transfer ENABLED (Last Board)
    Software Triggers ENABLED

    CSR Register = 0xf0264090 - Error Condition
    Control Register = 0x00ff02e2
    Events in FIFO = 0 (Block level = 1)

    CHIP Status: (slot 13)
    CHIP 0 Reg = 0x00c1 - OK
    CHIP 1 Reg = 0x00c1 - OK
    CHIP 2 Reg = 0x00c1 - OK
    CHIP 3 Reg = 0x00c1 - OK
    CHIP 4 Reg = 0x00c1 - OK
    CHIP 5 Reg = 0x00c1 - OK
    CHIP 6 Reg = 0x02c1 ** Check Latched Status **
    CHIP 7 Reg = 0x00c1 - OK

    This was the only error that came up. Power cycling the crate didn't
    seem to help so we took an access to look at this (in addition to a
    separate issue with the drift chambers).

    The F1 in slot 13 was swapped out with a 'new' module (with ser# 10L070).
    The crate was powered back up, went through its initialization cycle,
    WITH the same error (Check Latched Status on Chip 6).

    NOTE: the new F1 reports an older firmware revision (0xf1da).

    A copy of this log entry has been emailed to: feuerbac@jlab.org