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    User name R. Michaels

    Log entry time 14:49:29 on March15,2006

    Entry number 166804

    Followups:

    keyword=Drift chamber timing jitter

    Upon access we found that the TDC stops for ROC3 and ROC4 came
    directly from the L1A instead of from the retiming module as they
    should according to the gate diagram.
    http://hallaweb.jlab.org/experiment/E02-013/expdocs/gen_gates_trig.ps

    Fixing this would require moving one cable, with a time shift (that
    needs to be checked) of about 50 nsec. Rob F. is considering whether
    to do it. The implication is jitter in T3 drift chamber data which
    might be correctable using other timing info.