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    User name R. Michaels

    Log entry time 12:13:29 on November 4,2008

    Entry number 246636


    keyword=R-HRS work

    Prep for PVDIS parasite running.

    First, Ramesh took access and turned on HV and checked trigger
    timing. PVDIS trig 1-8 are aligned, T8 is the normal scint. trig,
    the others are defined from the PVDIS electronics (explained on
    PVDIS web site).

    Next, I took access and ran the DAQ and timed in the L1A and gate
    timing. The ADC gate is 400 nsec wide now (was 100), and the scint.
    comes 140 nsec after the gate (scope check); therefore, the leadglass
    should come 200 nsec after.

    This should be good enough for checkout.

    Other notes:

    1. Modified ~atrig/pvdis/trigger_right.map for delays. Downloaded
    trigger (R-HRS only).

    2. The RT signal is problematic -- very low amplitude. Probably a
    bad cable. We are running on L1A timing for now.

    3. The Trig. Super. inputs had an off-by-1 problem. The top input
    is "C", not T1.

    4. I strain relieved the ECL cables so that their weight is not on
    the connector. They were falling out in several places.