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User name xqian
Log entry time 03:24:23 on November 11, 2008
Entry number 248061
This entry is a followup to: 248025
Followups:
keyword=Possible timing problem; some suggestionsKalyan, Alex and I looked deeply into the the timing problem. Here are the conclusions.
1. The left HRS T3 time is out of the retiming window. We need to reduce the delay in HRS T3. This makes the previous taken data (5 pass) problematic. The ADC may be ok, need to check, the TDC definitely has some problems. We need to put in the correction in the timing for it. Please see Fig. 1. Our delay for the current production data is about 44 ns. It is clear that 0 is still in the window, but 30 is already out of window.
2. The weird plot that we saw before is clearly because the t3 is not delayed enough. The whole coincidence window is about 140 ns. We saw about 637 events (not due to the self-timing) and 1174 events in total, the time window is about 700 ns, which is roughly half of the whole 140 ns window. This means that the delayed T3 is roughly corresponding to the T1 in the middle.
3. This is a VERY serious problem for the BigBite Wire Chamber Tracking and related stuff. We need to have a retiming system on the BigBite side, make the L1A coincidence with BigBite T1.
4. The t1 plot, is not due to the coincidence trigger, It is really due to the blocking of itself. It can not be blocked by the thing in front of it and will block everything after it.
A copy of this log entry has been emailed to: kalyan@jlab.org,brads@jlab.org, jpchen@jlab.org,jiang@jlab.org,rom@jlab.org
Figure 1
Figure 2
Figure 3
