The v792 ADC gate comes 2.3usecs after the Helicity signal transitions (note also that the MPS and Helicity leading edges are coincident in time now). The signal will saturate the adc channel, but that is fine for a boolean on/off input.
Ahmed wanted a photo of the VME crate for reference (Figure 1). Sorry
about the blurry-cam.
A copy of this log entry has been emailed to: brads, zahmed
Figure 1