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    User name R. Michaels

    Log entry time 16:30:33 on June22,2010

    Entry number 328044

    keyword=L-HRS DAQ mods

    Per the plan, I split the fastbus modules between ROC3 (lower)
    and ROC4 (upper crate) on L-HRS. It's "working" -- with the
    qualifications listed below. Tomorrow after the detector stack
    is pushed in I should be able to finish in a couple hours.

    1. TDCs see tons of hits because the discrim. thresholds are off.
    Turning them on should cure all ills. (Fastbus test codes show all
    modules ok except ROC3 slot 4, but I'm 95% sure it's because of
    thresholds. Meanwhile the CODA readout doesn't see a problem.)

    2. The 3 ADCs in ROC3 don't have a gate cable to the TR6 line.

    3. Of course we want all ADCs to have independent front panel
    gates, not TR6. Arranging this requires finding 7 cables (we
    have most/all of them already deployed), and changing one bit
    in the CRL to use the front panel. Duck soup.