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    User name A. Camsonne

    Log entry time 11:46:35 on October 15, 2010

    Entry number 335005

    keyword=Logic module FPGA loaded with 256 us dead time for stop

    We saw some message "Empty Fifo" yesterday with beam. This happens if I read the board but the board is empty, so either the event counter for the number of event in the FIFO has issues or the ARS misses a trigger. I can see this happening if a trigger arrives while it is still encoding ( 128 uS dead ), so I asked to Magali to be more generous in the deadtime for now and we will see if that improves the problem ( which is occuring quite rarely but can potentially mess up our data synchronization ). The firmware version with a 256 uS dead time after each trigger is loaded now.



    A copy of this log entry has been emailed to: magne@jlab.org