• Main INDEX
  • Monthly INDEX
  • PREV
  • NEXT
    Make New Entry, Make Followup Entry

    User name A. Camsonne

    Log entry time 04:48:36 on October 27, 2010

    Entry number 336956

    keyword=DVCS sync check work

    We decided to try to get the sync checks to work since buffering seems operational. Hisham fixed the clock on ROC4, the gate was not getting to the module.

    I also tried to implement the ADC sync check. We have a DAC which feds ADC channels and the DAC value changes for every L1A

    I had trouble to find a good signal on the ADCs in the DVCS crates ( V792s borrowed from detector group ). I eventually ended making a special gate for those and signal look reasonably separated.

    There is a good correlation between ROC14 and ROC17 though the correlation is odd with ROC4, I am going through an attenuator module so I might want to move it to another channel.

    We will see if we xcan isolate events with those.



    A copy of this log entry has been emailed to: rom@jlab.org



    Figure 1



    Figure 2



    Figure 3



    Figure 4



    Figure 5