Log entry time 14:48:11 on February 28, 2011

Entry number 349208

I guess the ADC in slot 22 got removed while testing for dead time and was not put back. In the crl file, only slot 25,24 and 23 were read If I remember well the cabling slot 25 is bad and uncabled. So I shifted everything by one before : const ADC1SLOT = 23 const ADC2SLOT = 24 const ADC3SLOT = 25

now :

const ADC1SLOT = 22 const ADC2SLOT = 23 const ADC3SLOT = 24

so slot 22 should be back.