Log entry time 15:52:26 on March 09, 2011

Entry number 351141

This entry is a followup to: 346569

In brief after all the changes detailed below, the low momentum
simulated EDTM ADC signal (300 MeV/c protons) arrives 90 ns after the 
gate.  This afternoon, Igor checked the gating for BB cosmic singles and
it appeared we had plenty of headroom.

Now for the gory details: 

I revisited the retiming for BigBite today.  One issue was that now that
we want to do coincidence triggers and readout BigBite, the ADC gate 
timing was much tighter than preferred.  I removed as much delay to the
L1A before sending it to the ADC modules.  This partially consisted of
moving the retiming signal closer to the falling edge of the L1A used 
for the BB retiming window.  I removed about 40-50 ns of delay.

After I did this, I took the gate directly from the coincidence unit
used to make the retiming, but this required me to adjust the output
to 250 ns.  When I did this, I saw two peaks from the retiming: one
was due to the E-plane singles trigger used to make the retiming and
the other was caused by the delay L1A used to ensure that a gate is
generated in the absence of a E-plane singles trigger.  Earlier Brad and
I did not include an input to veto the delay L1A in case the E-plane
trigger does exist.  As long as the gate was wide enough it did not 
cause any problems until I tried to reduce it.

To fix this issue, I took an output from the retimed L1A into another
module to adjust the width to be 250 ns and took this signal into the 
veto input of the retiming module.  When a E-plane trigger exists, then
the veto blanks off a long enough time period to kill the delay L1A. 
When a E-plane trigger does not occur for a given L1A, then the retiming
is made from the delay L1A in the retiming circuit.  Igor and I checked
the different possibilities and the circuit behaved as expected.