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    User name orchen

    Log entry time 17:33:27 on March 17, 2011

    Entry number 352318

    keyword=Fixed timing problems in F1 and 1190 TDCs

    The timing problems are now solved.

    The origin was a mixed retimed and non-retimed gates in the TDCs.

    Before the change the situation in BB as that the refference chennel was the non retimed L1A and the common stop was the retimmed L1A. Now both the refference and common stop are from the retimed L1A with a fixed time difference of a few thens of nano seconds between them.

    It's important to note that the common stop for HAND is the non retimed L1A (and alwas was). The DBB.t#N variable has a retimed stop. If you want to use a non-retimed stop (from BB) for the HRS you need to use: DBB.lt#N (This stop is retimed with resopect for the L-HRS)



    A copy of this log entry has been emailed to: eip@tauphy.tau.ac.il, rshneor@jlab.org , igor.korover@gmail.com , or.chen@mail.huji.ac.il , doug@jlab.org , vasulk@jlab.org , n.muangma@gmail.com , sgilad@mit.edu , jwatson@kent.edu ,lawrence.selvy@gmail.com , rom@jlab.org , lselvy@jlab.org