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User name nmuangma
Log entry time 01:57:12 on April 06, 2011
Entry number 354539
keyword=do we need to set t0 for L&R vdc?
the following is the plot for the time in vdc. the edge is not set at
zero as what we did for the BigBite wire chamber. Should we get this
calibration done?
A copy of this log entry has been emailed to: vasulk@jlab.org,sgilad@mit.edu
Figure 1

Figure 2
