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    User name V. Sulkosky

    Log entry time 22:09:37 on November 04, 2011

    Entry number 359322

    This entry is a followup to: 359319

    Followups:

    keyword=Left Arm Fastbus crates and DAQ Update

    After Jack completed the installation of the third Fastbus crate in the 
    left HRS rack, Melissa, Ryan and I spent today rearranging the Fastbus
    configuration to add the new crate to the DAQ.
    
    First we made sure we could run the DAQ with ROC 3 and 4 as they were.  
    This configuration ran well after we fixed a missing ethernet cable for 
    ROC 4 and missing gates for ROC 3.  We then proceeded to rearrange the 
    Fastbus modules between the crates.  Here is the new configuration:
    
    ROC 3: (hallasfi3)
    slots 3-10 1877's for the VDC
    
    ROC 4: (hallasfi4)
    slots 3-10 1877's for the VDC
    slots 13-19 1877's for the FPP (will be removed for g2p)
    
    ROC 5: (hallasfi5)
    slot  15    unused 1875 high resolution TDC
    slot  16    spare 1877
    slot  18    spare 1881
    slots 19-21 1881's for the S1, S2m, GC and PR ADCs
    slot  23 1877 for the S1, S2m and GC TDCs
    slot  24 1881 for the bpm and raster ADC with 50 ns gate width
    
    After completing these changes, I updated the crl codes for both ROC 3 
    and ROC 4 and was able to successfully take data with the DAQ.  We then
    proceeded to fit the new FB crate ROC 5 with the required hardware to 
    include this crate in the DAQ.
    
    We borrowed the following modules mostly from BB:
    1) AUX card originally from ROC 3.  The hardware address for ROC 5 is 
    ROC 6 on branch 1 of the trigger supervisior.
    2) SFI unit from BigBite ROC 8 including a LeCroy 1151 scaler and a 
    5100 CPU.
    3) Back-plane distribution card (TDC stop, ADC gate, busy) from BigBite
    ROC 8.
    
    Ryan recabled the ADC modules, added a cable for the TDC back-plane 
    stops and a cable for the ADC back-plane gates and an ethernet cable for
    the CPU.  We are still missing a long enough cable for the serial 
    interface for the portserver and a cable to bring the busy signal from 
    ROC 5 to up to the Trigger supervisor for running buffered mode.
    
    To program the boot parameters for the ROC 5 CPU, we temporarily 
    borrowed the serial cable from ROC 4.  Before we left for the day, we 
    were able to successfully boot ROC 5 as hallasfi5.  The boot script is
    sfi5.boot under the vxworks directory on the a-onl account.
    
    Finally the last step is to create the crl code and a CODA configuration 
    that includes ROC 5.  I started working on the crl code today and I will
     try to finish it sometime tomorrow to test the DAQ with the new FB crate.
    


    A copy of this log entry has been emailed to: camsonne,rbziel,kalyan,melissac,pzhu,rom,segal,doug