We seemed to have bit 13 stuck on ROC3 a few years ago, I checked with Chris Cuevas and he suspected it was more likely to be a bad board than a bad crate. I did a test of the bus using a modified version of test_1881 which writes data and reads it back and the data looked indeed ok. I took a run with the sync module, this module gives a different DC level for each L1A to use as a sync check between crates. The data looks as expected. Several peaks and an overflow at 16383. Oddly there are some values above 8192, so maybe the module manages to take the pedestal into account, this will need to be checked. Picture if from run 1377 So I think we are ready to plug detectors on the left HRS ADCs and on the right HRS too.