4516 PROGRAMMABLE LOGIC UNIT
- High-Speed First Level Trigger Decisions
- Programmable Logic Functions
- Compatible with ECLine Data Handler Modules
- Compatible with ECLine Discriminators, ADC/TDC & MWPC Systems
- Designed-in Expandability
FAST, FIRSTLEVEL TRIGGER PROCESSING
The LeCroy ECLine programmable logic module family includes logic delays,
Boolean logic and other functions vital for high speed trigger systems.
It also includes fast table lookup permitting pre-programmed responses to
digital data. Functions are performed in only a few tens of nanoseconds,
permitting data to be screened prior to recording and increasing the sensitivity
of the experiment.
FUNCTIONAL DESCRIPTION
LeCroy's ECLine programmable logic modules are designed to quickly characterize
data so that a decision can be made for further processing. For example,
discriminators are employed to ensure that analog signals are of sufficient
amplitude to be interesting, and to provide logic outputs of fixed duration.
This stage is then followed by a coincidence latch which records the pattern
of "interesting signals" that occur within the same time window.
The first level trigger modules ensure that specific combinations of signals
have occurred. (Information on discrimina tors and latches may be found
on other ECLine data sheets.)
This first stage of data handling can then either reject the event as uninteresting,
or can pass data on for further processing. The more sophisticated line
of ECLine Data Handling modules include data conversion, arithmetic operations,
fast "do loop" type operations, and specialized pattern recognition.
Information on LeCroy data handling modules may be found on the data handlers
technical data sheet. All functions are programmable to provide complete
computer control of the triggering and data acquisition systems.
The LeCroy ECLine modules are compatible with several systems using ECL
bus such as the FERA (Fast Encoding and Readout ADC) system, 1821 based
FASTBUS systems as well as with the PCOS 3 System. These systems can interface
to VME via the LeCroy VME Dual Port Memory Model 1190.
Model 4516 Programmable Logic Unit
The 4516 is a 3-fold AND/OR logic unit. Each of the 16 channels has three
inputs (A, B and C). All channels have a front-panel output that is one
of the Boolean combinations: (A·B·C), (A+B)·C, (A·B)+C,
or (A+B)+C. The choice of logical function, AND (·) or OR (+), is set
for all channels by two switches. These switches are set either by rear-panel
manual switch settings or by CAMAC command.
The 150 MHz speed of 4516 lends great versatility to this simple module.
It can be used as a front-end AND/OR logic module, or an integral component
in a higher level trigger processor.
Model 4516 Logic Diagram
SPECIFICATIONS
Model 4516 Programmable Logic Unit
Inputs: 16 sets of three inputs, 110 ohm ±5% (high impedance
by removal of socketed terminators), DC -coupled, on 34-pin headers, for
ECL signals, minimum 2 nsec rise time. Maximum rate 150 MHz.
Veto: One rear-panel Lemo connector, 50 ohm impedance. Requires -600
mV signal. Permits gating of outputs, including OR outputs. Must overlap
coincidence for the three front-panel inputs by > 5nsec.
Outputs: 16, one per set of three inputs, complementary ECL logic
levels on 34-pin header.
OR Out: Two, one for OR of first 8 outputs, one for second 8 outputs
(factory option permits OR'ing of all 16 outputs).
Double Pulse Resolution: 5 nsec at minimum input width.
Coincidence Width: > 3.5 nsec determined by input pulse width.
Input-Output Delay: A or B to OUT by 11 nsec typical; A or B to OR
by 12 nsec, typical; C to OUT by 8 nsec, typical; C to OR by 9 nsec, typical;
VETO to OUT by 8 nsec, typical; VETO to OR by 6 nsec, typical.
Power: 50 mA at +6 V; 1.25 A at -6 V (7.8 W total).
CAMAC COMMANDS
Model 4516 Programmable Logic Unit
CAMAC COMMANDS
X: An X response is generated when a valid N, A, F command is recognized.
Z: Sets all channels to OR Mode.
CAMAC FUNCTION CODES
F(26)·A(0): Sets all C0s to AND Mode.
F(24)·A(0): Sets all C0s to OR Mode.
F(26)·A(1): Sets all C1s to AND Mode.
F(24)·A(1): Sets all C1s to OR Mode.
F(27)·A(0): Gives a Q response if C0 switch is in AND Mode.
F(27)·A(1): Gives a Q response if C1 switch is in AND Mode.
Copyright© September 1995. LeCroy is a registered trademark of
LeCroy Corporation. All rights reserved. Information in this publicaction
supersedes all earlier versions.