Difference between revisions of "CRL Code"
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*Started with code /home/gep/vx/5.5/551b/c_rams_list.crl | *Started with code /home/gep/vx/5.5/551b/c_rams_list.crl | ||
| − | * | + | *Updated cram_gem.crl . |
*The crl code for ROC1 (VME crate) is /home/gep/vx/5.5/551b/cram_gem.crl | *The crl code for ROC1 (VME crate) is /home/gep/vx/5.5/551b/cram_gem.crl | ||
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| − | < | + | <h4> T Registers in CRL code </h4> |
| + | |||
| + | *T1 = 0, T2 = 8, T3 = 20, T4 = 82, T5 = 38 | ||
| + | **Delay of hold from trig 500ns | ||
| + | **Delay of clock from hold 290ns | ||
| + | **Width of clock/convert pulse 400ns | ||
| + | **Period of clock/convert pulses 1660ns | ||
| + | **Delay of convert from clock 800ns | ||
| + | **Delay of convert from test 910ns | ||
<h3> CRL Code using CAENS 551 sequencer for ROC1 </h3> | <h3> CRL Code using CAENS 551 sequencer for ROC1 </h3> | ||
Latest revision as of 09:43, 28 July 2010
CRL Code using CAENS 551b sequencer for ROC1
- Started with code /home/gep/vx/5.5/551b/c_rams_list.crl
- Updated cram_gem.crl .
- The crl code for ROC1 (VME crate) is /home/gep/vx/5.5/551b/cram_gem.crl
- This code is compiled for download via: makelist cram_gem.crl ppc
T Registers in CRL code
- T1 = 0, T2 = 8, T3 = 20, T4 = 82, T5 = 38
- Delay of hold from trig 500ns
- Delay of clock from hold 290ns
- Width of clock/convert pulse 400ns
- Period of clock/convert pulses 1660ns
- Delay of convert from clock 800ns
- Delay of convert from test 910ns
CRL Code using CAENS 551 sequencer for ROC1
- The crl code for ROC1 (VME crate) is /home/gep/vx/5.5/551/cram_gem.crl
- This code is compiled for download via: makelist cram_gem.crl ppc
