Difference between revisions of "Task assignement August 15th 2010"
From Hall A Wiki
Line 9: | Line 9: | ||
!Secondary expert | !Secondary expert | ||
!Task list | !Task list | ||
− | !Completion level | + | !Completion level / Completed / Left to be done |
!Estimated completion date | !Estimated completion date | ||
− | ! | + | ! Main task |
|- | |- | ||
|Alexandre Camsonne | |Alexandre Camsonne | ||
Line 17: | Line 17: | ||
| Trigger | | Trigger | ||
| | | | ||
− | *ARS readout | + | * ARS test readout |
− | *Buffering test | + | * ARS final readout |
− | * HRS Trigger implementation | + | * Buffering test |
+ | * DVCS HRS Trigger implementation | ||
* Test decoder | * Test decoder | ||
* Slow control LED | * Slow control LED | ||
Line 29: | Line 30: | ||
* TOSP | * TOSP | ||
| | | | ||
− | * 40 % | + | * 40 % ( need implement checks and not working 100 % ) |
− | * 20 % | + | * 20 % ( need read all boards ) |
− | * | + | * 30 % ( need connect busy and create buffered read out ) |
− | * | + | * 0% ( when trigger logic is available ) |
− | * | + | * 60 % ( need implement checks ) |
− | * | + | * 50 % ( hardware ok - need write C functions driver and ROOT interface ) |
− | * | + | * 70 % ( ADC and patch ready - need to cable and test ) |
− | * | + | * 0% ( waiting for crates to be in HRS ) |
− | * | + | * 90 % ( need edit files ) |
− | * | + | * 30 % ( need adapt to DVCS ) |
− | * | + | * 20 % ( Pavel just go started on it ) |
+ | * 0 % ( still not found old one ) | ||
| | | | ||
− | + | * | |
* | * | ||
* | * |
Revision as of 18:14, 8 August 2010
Back to DVCS
Experiment tasks
Name | Expertise | Secondary expert | Task list | Completion level / Completed / Left to be done | Estimated completion date | Main task |
---|---|---|---|---|---|---|
Alexandre Camsonne | ARS DAQ, Slow control, decoding, paperwork | Trigger |
* ARS test readout * ARS final readout * Buffering test * DVCS HRS Trigger implementation * Test decoder * Slow control LED * Slow control current ADC * HRS integration * COO * ESAD * RSAD * TOSP |
* 40 % ( need implement checks and not working 100 % ) * 20 % ( need read all boards ) * 30 % ( need connect busy and create buffered read out ) * 0% ( when trigger logic is available ) * 60 % ( need implement checks ) * 50 % ( hardware ok - need write C functions driver and ROOT interface ) * 70 % ( ADC and patch ready - need to cable and test ) * 0% ( waiting for crates to be in HRS ) * 90 % ( need edit files ) * 30 % ( need adapt to DVCS ) * 20 % ( Pavel just go started on it ) * 0 % ( still not found old one ) |
* * * * * * * * * * * |
Buffering test |
Eric Fuchey | Calibration pi0, Photon Compton | |||||
Florian Itard | Shift schedule | |||||
Magalie Magne | Electronics ARS + Calorimeter triggger | |||||
Hisham Albataineh | ||||||
Carlos Munoz | Software, Survey, (Elastic calibration ?),MySQL | *Waveform analysis
*Survey |
||||
Julie Roche | Software, curing, cosmics paddle | DVCS analysis on adaq | DVCS analysis on adaq | |||
Charles Hyde | Run plan | Run plan | Run plan | |||
Robert Michaels | Helicity, HRS trigger, CompSimple |
|
|
|||
Sophia Iqbal ( until august 31st ) | Online GUI, EPICS start/end run |
} |