Difference between revisions of "TS supervisor test programs"
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ROC mask 10020c6 | ROC mask 10020c6 | ||
+ | |||
+ | |||
+ | |||
+ | ROC TS configuration RHRS | ||
+ | |||
+ | if ( (rspect) || (roc2)|| (roc1) || (roc26) || (roc6) || (rvme64x) ) { | ||
+ | /* Here it is assumed that the TS is on the right (formerly electron) arm */ | ||
+ | jj=0; | ||
+ | /* xx11x11x --> roc1,2,4,5 FPP is ROC4 in hardware */ | ||
+ | // if(rspect) jj = 0x6; /* Enable ROC 1 & ROC 2 on branch 1 */ | ||
+ | if(roc2) jj |= 0x4; /* ROC 2 on branch 1 */ | ||
+ | if(roc1) jj |= 0x2; /* ROC 1 on branch 1 */ | ||
+ | if(roc6) jj |= 0x40; | ||
+ | ///if(rvme64x) jj |= 0x8000; /* ROC 7 on branch 2 */ | ||
+ | if(rvme64x) jj |= 0x0080; /* ROC 7 on branch 1 */ | ||
+ | // if(rvme64x) jj |= 0x4000; /* ROC 6 on branch 2 */ | ||
+ | if(roc7) jj |= 0x00008000; /* Enable Hardware ROC 7 on branch 2 */ | ||
+ | if(roc9) jj |= 0x00002000; /* Enable Hardware ROC 5 on branch 2 */ | ||
+ | if(rspect) jj |= 0x6; /* Enable ROC 1 & ROC 2 on branch 1 */ | ||
+ | if(rcoinc&&!nofpp) | ||
+ | {/* Left HRS ROCs ROC 3 4 5*/ | ||
+ | jj |= 0x00002000; /* HW ROC6,branch 2 soft ROC3 */ | ||
+ | jj |= 0x00008000; /* HW ROC8,branch 2 soft ROC4*/ | ||
+ | jj |= 0x00004000; /* HW ROC7,branch 2 soft ROC5*/ | ||
+ | jj |= 0x00001000; /* HW ROC4,branch 2 soft ROC31*/ | ||
+ | } | ||
+ | if(roc3) jj |= 0x00002000; /* HW ROC6,branch 2 soft ROC3 */ | ||
+ | if(roc4) jj |= 0x00008000; /* HW ROC8,branch 2 soft ROC4*/ | ||
+ | if(roc5) jj |= 0x00004000; /* HW ROC7,branch 2 soft ROC5*/ | ||
+ | if(rcoinc&&nofpp) jj = 0x26; /* same as above, minus roc4 */ | ||
+ | if(roc26) jj |= 0x04000000; /* ROC 26 Happex crate on branch 4*/ | ||
+ | /* Add scalers */ | ||
+ | jj |= 0x01000000; /* ROC0 on branch 4 */ | ||
+ | printf("Right Arm TS Control -- Roc Selection %x\n",jj); | ||
+ | ts->roc = jj; | ||
+ | } |
Latest revision as of 12:58, 29 October 2018
In "/site/coda/ts_test/test_programs"
On TS cd "/site/coda/ts_test/test_programs" ld < ts2_link.o ts2_link
On Fastbus ROC cd "/site/coda/ts_test/test_programs" ld < sfi_link.o sfi_link
ROC mask 10020c6
ROC TS configuration RHRS
if ( (rspect) || (roc2)|| (roc1) || (roc26) || (roc6) || (rvme64x) ) { /* Here it is assumed that the TS is on the right (formerly electron) arm */ jj=0; /* xx11x11x --> roc1,2,4,5 FPP is ROC4 in hardware */ // if(rspect) jj = 0x6; /* Enable ROC 1 & ROC 2 on branch 1 */ if(roc2) jj |= 0x4; /* ROC 2 on branch 1 */ if(roc1) jj |= 0x2; /* ROC 1 on branch 1 */ if(roc6) jj |= 0x40; ///if(rvme64x) jj |= 0x8000; /* ROC 7 on branch 2 */ if(rvme64x) jj |= 0x0080; /* ROC 7 on branch 1 */ // if(rvme64x) jj |= 0x4000; /* ROC 6 on branch 2 */ if(roc7) jj |= 0x00008000; /* Enable Hardware ROC 7 on branch 2 */ if(roc9) jj |= 0x00002000; /* Enable Hardware ROC 5 on branch 2 */ if(rspect) jj |= 0x6; /* Enable ROC 1 & ROC 2 on branch 1 */ if(rcoinc&&!nofpp) {/* Left HRS ROCs ROC 3 4 5*/
jj |= 0x00002000; /* HW ROC6,branch 2 soft ROC3 */ jj |= 0x00008000; /* HW ROC8,branch 2 soft ROC4*/
jj |= 0x00004000; /* HW ROC7,branch 2 soft ROC5*/ jj |= 0x00001000; /* HW ROC4,branch 2 soft ROC31*/ } if(roc3) jj |= 0x00002000; /* HW ROC6,branch 2 soft ROC3 */ if(roc4) jj |= 0x00008000; /* HW ROC8,branch 2 soft ROC4*/ if(roc5) jj |= 0x00004000; /* HW ROC7,branch 2 soft ROC5*/ if(rcoinc&&nofpp) jj = 0x26; /* same as above, minus roc4 */ if(roc26) jj |= 0x04000000; /* ROC 26 Happex crate on branch 4*/ /* Add scalers */ jj |= 0x01000000; /* ROC0 on branch 4 */ printf("Right Arm TS Control -- Roc Selection %x\n",jj); ts->roc = jj; }