Difference between revisions of "BBCAL Documents"

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==Capacitative couplings to FIFO outputs==
 
==Capacitative couplings to FIFO outputs==
 
*Information on capacitative couplings to FIFO outputs [https://logbooks.jlab.org/entry/3914544 link]
 
*Information on capacitative couplings to FIFO outputs [https://logbooks.jlab.org/entry/3914544 link]
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==EDTM setup with the DVCS pulser==
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*EDTM setup with the DVCS pulser [[Media:coin.png| (png)]]

Revision as of 11:53, 29 September 2021

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BBCal Software

BigBite How-to

Adjusting High Voltage using GUI [‎pdf]

BBCal dimensions

Cable Layout in the Hall

Detector Maps

  • Shower elementID vs rows and columns numbers (pdf)
  • Preshower elementID vs rows and columns numbers (pdf)

Cable Mapping at Front End

  • BBCAL mapping at front end patch panels [link]
  • BBCAL mapping at front end summer modules [link]

Cable Mapping at Weldment

High Voltage Mapping

Trigger Logic and Monitor

  • Introduction to the BigBite Trigger Logic [link]
  • Trigger Monitor Patch panels at Weldment and Front End (pdf)
  • NIM to ECL units for trigger monitor (pdf)


DAQ

  • FADC Addresses (png)
    • The position of the word matches the position of the switch, if the VME connector is on the right.

BigBite Block Dimensions

  • BigBite shower and preshower block dimensions link
  • Shower block layout that includes the position of old preshower blocks (png)

Capacitative couplings to FIFO outputs

  • Information on capacitative couplings to FIFO outputs link

EDTM setup with the DVCS pulser

  • EDTM setup with the DVCS pulser (png)