Difference between revisions of "BBCAL Documents"
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==Detector Maps== | ==Detector Maps== | ||
− | *Shower elementID vs rows and columns numbers[[ | + | *Shower elementID vs rows and columns numbers [[https://sbs.jlab.org/DocDB/0003/000300/001/sh_det_map.pdf link]] |
− | *Preshower elementID vs rows and columns numbers[[ | + | *Preshower elementID vs rows and columns numbers [[https://sbs.jlab.org/DocDB/0003/000300/001/PS_detMap.pdf link]] |
==Cable Mapping at Front End== | ==Cable Mapping at Front End== | ||
Line 32: | Line 32: | ||
*Introduction to the BigBite Trigger Logic [[https://hallaweb.jlab.org/wiki/images/5/57/BBtrig_introductory.pdf link]] | *Introduction to the BigBite Trigger Logic [[https://hallaweb.jlab.org/wiki/images/5/57/BBtrig_introductory.pdf link]] | ||
*Trigger Monitor Patch panels at Weldment and Front End [[Media:Trigger_monitor_patch_panel.pdf| (pdf)]] | *Trigger Monitor Patch panels at Weldment and Front End [[Media:Trigger_monitor_patch_panel.pdf| (pdf)]] | ||
− | *NIM to ECL units for trigger monitor[[Media:NIM_TO_ECL.pdf| (pdf)]] | + | <!--- *NIM to ECL units for trigger monitor[[Media:NIM_TO_ECL.pdf| (pdf)]] ---> |
− | + | *NIM to ECL units for trigger monitor[[Media:trigmonmap.png| (png)]] | |
+ | *Trigger sums chart[[Media:trigger_sums.png| (png)]] | ||
==DAQ== | ==DAQ== | ||
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==BigBite Block Dimensions== | ==BigBite Block Dimensions== | ||
*BigBite shower and preshower block dimensions [https://sbs.jlab.org/cgi-bin/DocDB/private/ShowDocument?docid=113 link] | *BigBite shower and preshower block dimensions [https://sbs.jlab.org/cgi-bin/DocDB/private/ShowDocument?docid=113 link] | ||
− | *Shower block layout | + | *Shower block layout that includes the position of old preshower blocks[[Media:mapping_shower_oldpreshower.png| (png)]] |
+ | |||
+ | ==Capacitative couplings to FIFO outputs== | ||
+ | *Information on capacitative couplings to FIFO outputs [https://logbooks.jlab.org/entry/3914544 link] | ||
+ | |||
+ | ==EDTM setup with the DVCS pulser== | ||
+ | *EDTM setup with the DVCS pulser [[Media:coin.png| (png)]] | ||
+ | |||
+ | ==Study of the Linear Region of Operation for all the Electronic Modules== | ||
+ | *Study of the Linear Region of Operation for all the Electronic Modules [https://sbs.jlab.org/cgi-bin/DocDB/private/ShowDocument?docid=118 link] |
Latest revision as of 17:25, 31 October 2022
Contents
- 1 BBCal Software
- 2 BigBite How-to
- 3 BBCal dimensions
- 4 Cable Layout in the Hall
- 5 Detector Maps
- 6 Cable Mapping at Front End
- 7 Cable Mapping at Weldment
- 8 High Voltage Mapping
- 9 Trigger Logic and Monitor
- 10 DAQ
- 11 BigBite Block Dimensions
- 12 Capacitative couplings to FIFO outputs
- 13 EDTM setup with the DVCS pulser
- 14 Study of the Linear Region of Operation for all the Electronic Modules
BBCal Software
- June 30th Presentation on Updates to the SBSGenericDetector
- Git repo with the start of BBShower software documentation
BigBite How-to
Adjusting High Voltage using GUI [pdf]
BBCal dimensions
- File with 3D and 2D CAD drawings of BB detector stack. Last page has relative z-distance of detectors.
Cable Layout in the Hall
Detector Maps
- Shower elementID vs rows and columns numbers [link]
- Preshower elementID vs rows and columns numbers [link]
Cable Mapping at Front End
Cable Mapping at Weldment
- BBCAL cable mapping original (xlsx)
- BBCal cable at FADCs (pdf)
- BBCal cable at Weldment patch panel (pdf)
High Voltage Mapping
Trigger Logic and Monitor
- Introduction to the BigBite Trigger Logic [link]
- Trigger Monitor Patch panels at Weldment and Front End (pdf)
- NIM to ECL units for trigger monitor (png)
- Trigger sums chart (png)
DAQ
- FADC Addresses (png)
- The position of the word matches the position of the switch, if the VME connector is on the right.
BigBite Block Dimensions
- BigBite shower and preshower block dimensions link
- Shower block layout that includes the position of old preshower blocks (png)
Capacitative couplings to FIFO outputs
- Information on capacitative couplings to FIFO outputs link
EDTM setup with the DVCS pulser
- EDTM setup with the DVCS pulser (png)
Study of the Linear Region of Operation for all the Electronic Modules
- Study of the Linear Region of Operation for all the Electronic Modules link