CDET scintillator test

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Revision as of 13:19, 8 July 2014 by Jones (Talk | contribs) (DAQ setup)

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Test setup

Setting up the hardware and DAQ required for the scintillator test project.

DAQ setup

  • Working on computer wm122 under account adaq ( which uses usual password)
  • Created script /home/adaq/coda_user_setup_bash to define CODA 2.6 variables. This script is sourced by .bash_profile .
    • Set EXPID=wmtest and SESSION=wmtest instead of previous eeltest.
  • The msql daemon must be running. Chcek by command ps -ef | grep -i msqld . It should return the process number for the msqld.
  • The CODA database is wmtest.
    • The eeltest database is being used by yer122 so that name cannot be used.
    • The eeltest database was dumped to a file.
    • The dump file was editted to change eeltest to wmtest .
    • A database wmtest was created and then the dump file with wmtest edits was restored into the msql
    • The file /home/adaq/msql/readme explains these basic msql commands.
    • On June 28th, an msql dump of database wmtest was made called /home/adaq/msql/msql_dump-wmtest
  • To start up CODA ( right now do not use startcoda script) run this command in separate terminal windows
    • et_start ( note that if it gives error message try deleting files /tmp/et_start*)
    • rcplatform
    • coda_eb_rc3 -i -n EB1 -t CDEB
    • coda_er_rc3 -i -n ER1 -t ER
    • the roc process is started when the CPU ( a1nccvme ) in the VME crate is booted.
    • rcgui
  • To start taking data from the rcgui interface
    • SESSION=wmtest and CONFIG=KAeel122 should be selected.
      • Note that if you update the CODA database, the COOLHANDS database needs to be updated.
    • From menu select Connect
    • Click on the Config button. EB1, ER1 and ROC1 should be configured.
    • Click on the Download button. EB1, ER1 and ROC1 should be downloaded.
    • Click on the "Start" button to do a Prestart and Go. One can also first click on the Prestart button and then the Go button.
  • Setup of VME cpu a1nccvme
    • The boot script is at /home/vx/gc_test_2.5.boot . Script initiates one 792 TDC and one 792 QDC.
    • ROC task spawned as ROC1
  • Setup of KAEEL112 configuration in wmtest database.
    • For the event list use /home/vx/bbite/2.5/examples/crl/event_list.o
    • For readout of the QDC and TDC, the crl code is at /home/vx/bbite/newele_test.crl.
      • TDC setup in common stop mode with bin width of 222.5ns and sparsification on.
      • QDC setup with sparsification off.

Data runs

  • Run 2627 .
    • Start time: Fri June 27th 17:54
    • Stop time : Mon June 30th 9:33
    • Total events: 2165
    • Top scintillator HV=-1700. No amplifier. Threshold = -60mV . Use linear FI/FO to 200ns delay to ADC Chan 0.
    • Bottom scintillator HV=-1700. No amplifier. Threshold = -60mV . Use linear FI/FO to 200ns delay to ADC Chan 3. Did not see ADC signal in data. Switch signal to ADC chan 0 and saw signal in earlier run.
    • WLS fiber bar HV = -1700. Amplifier 10x to 200ns delay to ADC Chan 2. Threshold = -350mV .
    • Trigger is coincidenc between top and bottom . Gate widths are 30ns with the bottom delayed by 12ns.
    • Gate width to the ADC is 310ns.

Hardware Setup

There are two "paths" of interest to follow; the signal from the WLS, and the signal from the fingers. File:SetupTest.pdf


The raw signal from the WLS is fed into an amplifier (10x amplification). The amplified signal is then sent to an octal discriminator and to a delay box (200 ns delay) as two separate signals. The delayed signal is sent right to an ADC (wire 2, channel 1). The discriminated signal is sent to the level translator, translating NIM to ECL, which is sent to the TDC.


Both signals are fed into a fan in/out. The signals are then sent to a delay box and to an octal discriminator as two separate paths. The delay box path (200 ns delay) goes right to the ADC. The discriminated signals go to a logic unit, which looks for coincidence between signals (the bottom signal is delayed 12 ns to control timing). When a coincidence is seen, the logic unit sends a signal to the ECL module. The ECL module then sends a signal to the MVME, which returns a level 1 accept to the ECL module. The level 1 accept is then translated to NIM and sent to a gate generator, which sends back a gate signal to the ECL module. The ECL module then translates this gate to an ECL signal, and sends a gate to the ADC and to the TDC (the TDC gate is delayed 100 ns).

June 24, 2014

Set up most of the modules required to collect data; gate generator still needs to be hooked up after the level 1 alert is sent from the computer. Important information includes:

  • Threshold of top finger was set to -40 mV in an octal discriminator.
  • Threshold of bottom finger was set to -50 mV in the same octal discriminator, different port.
  • Threshold of the WLS/bar was set to -10 mV (to be double checked) in a separate 16-channel discriminator.
  • Bottom finger signal is delayed by 12.5 ns, relative to the top finger signal, passing from the discriminator into the logic module (so that coincidence timing depends on the bottom finger). 12.5 ns offset allows sufficient buffer against spread in incoming logical signal times due to analog signals of different magnitude.

A model V792 ADC is used. Signals from each PMT pass into the ADC in the following channels:

  • Channel 1 -> Top finger
  • Channel 2 -> WLS/bar
  • Channel 3 -> Bottom finger

The fingers are each hooked to a Philips XP2282/B PMT, while the WLS/bar is hooked to a Philips XP2262/B PMT (to be double checked). The fingers share a common HV supply. Each HV supply is held at -1700 Volts.