Difference between revisions of "G2p Crate Maps"

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Here you will the maps for the high-voltage crates and patch panels for both the LHRS and RHRS. If you are looking for how to change HV's you've come to the wrong place. This documentation is mainly for troubleshooting. The patch panel's bring the detector ADC signals from "upstairs" where the trigger electronics is located to "downstairs" where the FASTBUS crates are.  
+
Here you will find the maps for the high-voltage crates and patch panels for both the LHRS and RHRS. If you are looking for how to change HVs you've come to the wrong place. This documentation is mainly for troubleshooting. The patch panel's bring the detector ADC signals from "upstairs" where the trigger electronics are located to "downstairs" where the FASTBUS crates are. I've only labeled patch panel channels BAD if I have verified they do not work. If there is a blank patch panel location, it was blank when I did the mapping. Therefore I cannot confirm if it is a bad connection (most likely it is though).
 +
 
 +
Note: On the RHRS TA is the Shower
  
 
==LHRS==
 
==LHRS==
 
{|  border="1"
 
{|  border="1"
−
|+ LHRS HV Map
+
|+ LHRS LeCroy 1450 HV Crate Map (column = slot, row = channel)
 
|-
 
|-
 
! scope="col" |  
 
! scope="col" |  
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|-
 
|-
 
! scope="row" | 0
 
! scope="row" | 0
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| s2mL01 || s1L01 || GC01 || PIRL01 || PIRL13 || PIRL25 || Empty || FPP || FPP || PR01|| PR13 || PIRR08 || s2mR01 || s2mL13 || DAD02L || DAD01R
+
| s2mL01 || s1L01 || GC01 || PIR1 01 || PIR1 13 || PIR2 08 || Empty || FPP || FPP || PIR2 20|| PIR2 32 || PIR1 25 || s2mR01 || s2mL13 || DAD02L || DAD01R
 
|-
 
|-
 
! scope="row" | 1
 
! scope="row" | 1
−
| s2mL02 || s1L02 || GC02 || PIRL02 || PIRL14 || PIRL26 || ||  || ||PR02 || PR14 || PIRR09 || s2mR02 || s2mL14 || DAD03L || DAD02R
+
| s2mL02 || s1L02 || GC02 || PIR1 02 || PIR1 14 || PIR2 09 || ||  || ||PIR2 21 || PIR2 33 || PIR1 26 || s2mR02 || s2mL14 || DAD03L || DAD02R
 
|-
 
|-
 
! scope="row" | 2
 
! scope="row" | 2
−
| s2mL03 || s1L03 || GC03 || PIRL03 || PIRL15 || PIRL27 || ||  || ||PR03 || PR15 || PIRR10 || s2mR03 || s2mL15 || DAD04L || DAD03R
+
| s2mL03 || s1L03 || GC03 || PIR1 03 || PIR1 15 || PIR2 10 || ||  || ||PIR2 22 || PIR2 34 || PIR1 27 || s2mR03 || s2mL15 || DAD04L || DAD03R
 
|-
 
|-
 
! scope="row" | 3
 
! scope="row" | 3
−
| s2mL04 || s1L04 || GC04 || PIRL04 || PIRL16 || PIRL28 || ||  || ||PR04 || PR16 || PIRR11 || s2mR04 || s2mL16 || DAD05L || DAD04R
+
| s2mL04 || s1L04 || GC04 || PIR1 04 || PIR1 16 || PIR2 11 || ||  || ||PIR2 23 || PIR2 17 || PIR1 28 || s2mR04 || s2mL16 || DAD05L || DAD04R
 
|-
 
|-
 
! scope="row" | 4
 
! scope="row" | 4
−
| s2mL05 || s1L05 || GC05 || PIRL05 || PIRL17 || PIRL29 || ||  || ||PR05 || PR17 || PIRR12 || s2mR05 || s2mR13 || DAD06L || DAD05R
+
| s2mL05 || s1L05 || GC05 || PIR1 05 || PIR1 17 || PIR2 12 || ||  || ||PIR2 24 || PIR2 18 || PIR1 29 || s2mR05 || s2mR13 || DAD06L || DAD05R
 
|-
 
|-
 
! scope="row" | 5
 
! scope="row" | 5
−
| s2mL06 || s1L06 || GC06 || PIRL06 || PIRL18 || PIRL30 || ||  || ||PR06 || PIRR01 || PIRR13 || s2mR06 || s2mR14 || DAD07L || DAD06R
+
| s2mL06 || s1L06 || GC06 || PIR1 06 || PIR2 01 || PIR2 13 || ||  || ||PIR2 25 || PIR1 18 || PIR1 30 || s2mR06 || s2mR14 || DAD07L || DAD06R
 
|-
 
|-
 
! scope="row" | 6
 
! scope="row" | 6
−
| s2mL07 || s1R01 || GC07 || PIRL07 || PIRL19 || PIRL31 || ||  || ||PR07 || PIRR02 || PIRR14 || s2mR07 || s2mR15 || DAD08L || DAD07R
+
| s2mL07 || s1R01 || GC07 || PIR1 07 || PIR2 02 || PIR2 14 || ||  || ||PIR2 26 || PIR1 19 || PIR1 31 || s2mR07 || s2mR15 || DAD08L || DAD07R
 
|-
 
|-
 
! scope="row" | 7
 
! scope="row" | 7
−
| s2mL08 || s1R02|| GC08 || PIRL08 || PIRL20 || PIRL32 || ||  || ||PR08 || PIRR03 || PIRR15 || s2mR08 || s2mR16 || DAD09L || DAD08R
+
| s2mL08 || s1R02|| GC08 || PIR1 08 || PIR2 03 || PIR2 15 || ||  || ||PIR2 27 || PIR1 20 || PIR1 32 || s2mR08 || s2mR16 || DAD09L || DAD08R
 
|-
 
|-
 
! scope="row" | 8
 
! scope="row" | 8
−
| s2mL09 || s1R03 || GC09 || PIRL09 || PIRL21 || PIRL33 || ||  || ||PR09 || PIRR04 || PIRR16 || s2mR09 || s0A || DAD10L || DAD09R
+
| s2mL09 || s1R03 || GC09 || PIR1 09 || PIR2 04 || PIR2 16 || ||  || ||PIR2 28 || PIR1 21 || PIR1 33 || s2mR09 || s0A || DAD10L || DAD09R
 
|-
 
|-
 
! scope="row" | 9
 
! scope="row" | 9
−
| s2mL10 || s1R04 || GC10 || PIRL10 || PIRL22 || PIRL34 || ||  || ||PR10 || PIRR05 || PIRR17 || s2mR10 || s0B || DAD11L || DAD10R
+
| s2mL10 || s1R04 || GC10 || PIR1 10 || PIR2 05 || PIR2 19 || ||  || ||PIR2 29 || PIR1 22 || PIR1 34 || s2mR10 || s0B || DAD11L || DAD10R
 
|-
 
|-
 
! scope="row" | 10
 
! scope="row" | 10
−
| s2mL11 || s1R05 ||  || PIRL11 || PIRL23 ||  || ||  || ||PR11 || PIRR06 ||  || s2mR11 || || DAD12L || DAD11R
+
| s2mL11 || s1R05 ||  || PIR1 11 || PIR2 06 ||  || ||  || ||PIR2 30 || PIR1 23 ||  || s2mR11 || || DAD12L || DAD11R
 
|-
 
|-
 
! scope="row" | 11
 
! scope="row" | 11
−
| s2mL12 || s1R06 ||  || PIRL12 || PIRL24 ||  || ||  || ||PR12 || PIRR07 ||  || s2mR12|| || || DAD12R
+
| s2mL12 || s1R06 ||  || PIR1 12 || PIR2 07 ||  || ||  || ||PIR2 31 || PIR1 24 ||  || s2mR12|| || || DAD12R
 
|}
 
|}
  
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| PIRL33 || PIRL34 || PIRR 33 || PIRR34  
 
| PIRL33 || PIRL34 || PIRR 33 || PIRR34  
 
|}
 
|}
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==RHRS==
 
==RHRS==
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{|  border="1"
 
{|  border="1"
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|+ RHRS HV Map
+
|+ RHRS LeCroy 1450 HV Crate Map (column = slot, row = channel)
 
|-
 
|-
 
! scope="col" |  
 
! scope="col" |  
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|-
 
|}
 
|}
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{|  border="1"
 
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{|  border="1"
 
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|TA65|| TA66 || TA67 || TA68|| TA69|| TA70 || TA71 || TA72|| TA73 || TA74|| TA75 || BAD || TA77|| TA78|| TA79 || TA80
 
|TA65|| TA66 || TA67 || TA68|| TA69|| TA70 || TA71 || TA72|| TA73 || TA74|| TA75 || BAD || TA77|| TA78|| TA79 || TA80
 
|}
 
|}
 +
 +
  
 
{|  border="1"
 
{|  border="1"

Latest revision as of 15:05, 1 March 2012

Here you will find the maps for the high-voltage crates and patch panels for both the LHRS and RHRS. If you are looking for how to change HVs you've come to the wrong place. This documentation is mainly for troubleshooting. The patch panel's bring the detector ADC signals from "upstairs" where the trigger electronics are located to "downstairs" where the FASTBUS crates are. I've only labeled patch panel channels BAD if I have verified they do not work. If there is a blank patch panel location, it was blank when I did the mapping. Therefore I cannot confirm if it is a bad connection (most likely it is though).

Note: On the RHRS TA is the Shower

LHRS

LHRS LeCroy 1450 HV Crate Map (column = slot, row = channel)
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
0 s2mL01 s1L01 GC01 PIR1 01 PIR1 13 PIR2 08 Empty FPP FPP PIR2 20 PIR2 32 PIR1 25 s2mR01 s2mL13 DAD02L DAD01R
1 s2mL02 s1L02 GC02 PIR1 02 PIR1 14 PIR2 09 PIR2 21 PIR2 33 PIR1 26 s2mR02 s2mL14 DAD03L DAD02R
2 s2mL03 s1L03 GC03 PIR1 03 PIR1 15 PIR2 10 PIR2 22 PIR2 34 PIR1 27 s2mR03 s2mL15 DAD04L DAD03R
3 s2mL04 s1L04 GC04 PIR1 04 PIR1 16 PIR2 11 PIR2 23 PIR2 17 PIR1 28 s2mR04 s2mL16 DAD05L DAD04R
4 s2mL05 s1L05 GC05 PIR1 05 PIR1 17 PIR2 12 PIR2 24 PIR2 18 PIR1 29 s2mR05 s2mR13 DAD06L DAD05R
5 s2mL06 s1L06 GC06 PIR1 06 PIR2 01 PIR2 13 PIR2 25 PIR1 18 PIR1 30 s2mR06 s2mR14 DAD07L DAD06R
6 s2mL07 s1R01 GC07 PIR1 07 PIR2 02 PIR2 14 PIR2 26 PIR1 19 PIR1 31 s2mR07 s2mR15 DAD08L DAD07R
7 s2mL08 s1R02 GC08 PIR1 08 PIR2 03 PIR2 15 PIR2 27 PIR1 20 PIR1 32 s2mR08 s2mR16 DAD09L DAD08R
8 s2mL09 s1R03 GC09 PIR1 09 PIR2 04 PIR2 16 PIR2 28 PIR1 21 PIR1 33 s2mR09 s0A DAD10L DAD09R
9 s2mL10 s1R04 GC10 PIR1 10 PIR2 05 PIR2 19 PIR2 29 PIR1 22 PIR1 34 s2mR10 s0B DAD11L DAD10R
10 s2mL11 s1R05 PIR1 11 PIR2 06 PIR2 30 PIR1 23 s2mR11 DAD12L DAD11R
11 s2mL12 s1R06 PIR1 12 PIR2 07 PIR2 31 PIR1 24 s2mR12 DAD12R


LHRS PATCH PANEL
Alfred 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
A s2mL01 s2mL02 s2mL03 s2mL04 s2mL05 s2mL06 s2mL07 s2mL08 s2mL09 s2mL10 s2mL11 s2mL12 s2mL13 s2mL14 s2mL15 s2mL16
B s2mR01 s2mR02 s2mR03 s2mR04 s2mR05 s2mR06 s2mR07 s2mR09 s2mR10 s2mR11 s2mR12 s2mR13 s2mR14 BAD s2mR16
C s1L01 s1L02 s1L03 s1L04 s1L05 s1L06 s1R01 s1R02 s1R03 s1R04 s1R05 S0Low S0Up S1R06 s2mR08
D GC01 GC02 GC03 GC04 GC05 GC06 GC07 GC08 GC09 GC10 GCSum Ux3 Dx1
LHRS PATCH PANEL
Betty 1
B s2mR15
LHRS PATCH PANEL
Charlie 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
A PIRL01 PIRL02 PIRL03 PIRL04 PIRL05 PIRL06 PIRL07 PIRL08 PIRL09 PIRL10 PIRL11 PIRL12 PIRL13 PIRL14 PIRL15 PIRL16
B PIRL17 PIRL18 PIRL19 PIRL20 PIRL21 PIRL22 PIRL23 PIRL24 PIRL25 PIRL26 PIRL27 PIRL28 PIRL29 PIRL30 PIRL31 PIRL32
C PIRR01 PIRR02 PIRR03 PIRR04 PIRR05 PIRR06 PIRR07 PIRR08 PIRR09 PIRR10 PIRR11 PIRR12 PIRR13 PIRR14 PIRR15 PIRR16
D PIRR17 PIRR18 PIRR19 PIRR20 PIRR21 PIRR22 PIRR23 PIRR24 PIRR25 PIRR26 PIRR27 PIRR28 PIRR29 PIRR30 PIRR31 PIRR32
E PIRL33 PIRL34 PIRR 33 PIRR34

RHRS

RHRS LeCroy 1450 HV Crate Map (column = slot, row = channel)
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
0 s2mL01 s2mR01 s2mL13 TA01 TA13 TA26 TA39 TA52 TA65 s1L01 PS1R PS13R PS1L PS13L GC01 TA77
1 s2mL02 s2mR02 s2mL14 TA02 TA14 TA27 TA40 TA53 TA66 s1L02 PS2R PS14R PS2L PSL14 GC02 TA78
2 s2mL03 s2mR03 s2mL15 TA03 TA15 TA28 TA41 TA54 TA67 s1L03 PS3R PS15R PS3L PSL15 GC03 TA79
3 s2mL04 s2mR04 s2mL16 TA04 TA17 TA29 TA42 TA55 TA68 s1L04 PS4R PS16R PS4L PSL16 GC04 LUM01
4 s2mL05 s2mR05 s2mR13 TA05 TA18 TA30 TA43 TA56 TA69 s1L05 PS5R PS17R PS5L PS17L GC05 LUM02
5 s2mL06 s2mR06 s2mR14 TA06 TA19 TA31 TA44 TA57 TA70 s1L06 PS6R PS18R PS6L PS18L GC06 LUM03
6 s2mL07 s2mR07 s2mR15 TA07 TA20 TA33 TA45 TA58 TA71 s1R01 PS7R PS19R PS7L PS19L GC07 LUM04
7 s2mL08 s2mR08 s2mR16 TA08 TA21 TA34 TA46 TA59 TA72 s1R02 PS8R PS20R PS8L PS20L GC08
8 s2mL09 s2mR09 s0A TA09 TA22 TA35 TA47 TA60 TA73 s1R03 PS9R PS21R PS9L PS21L GC09 LUM05
9 s2mL10 s2mR10 s0B TA10 TA23 TA36 TA49 TA61 TA74 s1R04 PS10R PS22R PS10L PS22L GC10 LUM06
10 s2mL11 s2mR11 TA11 TA24 TA37 TA50 TA62 TA75 s1R05 PS11R PS23R PS11L PS23L LUM07
11 s2mL12 s2mR12 TA12 TA25 TA38 TA51 TA63 TA76 s1R06 PS12R PS24R PS12L PS24L LUM08


RHRS PATCH PANEL
Alfred 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
A s2mL01 s2mL02 s2mL03 s2mL04 s2mL05 s2mL06 s2mL07 s2mL08 s2mL09 s2mL10 s2mL11 s2mL12 s2mL13 s2mL14 s2mL15 s2mL16
B s2mR01 s2mR02 s2mR03 s2mR04 s2mR05 s2mR06 s2mR07 s2mR08 s2mR09 s2mR10 s2mR11 s2mR12 s2mR13 s2mR14 s2mR15 s2mR16
C GC01 GC02 GC03 GC04 GC06 GC08 GC09 GC10 GCSum GC5 GC7 PS19R TA76
D s1L01 s1L02 s1L03 s1L04 s1L05 s1L06 s1R01 s1R02 s1R03 s1R04 s1R05 s1R06 S0A S0B BAD BAD


RHRS PATCH PANEL
Charlie 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
A PS1R PS2R PS3R PS4R PS5R PS6R PS7R PS8R PS9R PS10R PS11R PS12R PS13R PS14R PS15R PS16R
B PS17R PS18R BAD PS20R PS21R PS22R PS23R PS24R PS1L PS2L PS3L PS4L PS5L PS6L PS7L PS8L
C PS9L PS10L PS11L PS12L PS13L PS14L PS15L PS16L PS17L PS18L PS19L PS20L PS21L PS22L PS23L PS24L
D TA01 TA02 TA03 TA04 TA05 TA06 TA07 TA08 TA09 TA10 TA11 TA12 TA13 TA14 TA15 TA16


RHRS PATCH PANEL
Eunice 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
A TA49 TA50 TA51 TA52 TA53 TA54 TA55 TA56 TA57 TA58 TA59 TA60 TA61 TA62 TA63 TA64
B TA65 TA66 TA67 TA68 TA69 TA70 TA71 TA72 TA73 TA74 TA75 BAD TA77 TA78 TA79 TA80


RHRS PATCH PANEL
Dex 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
A TA17 TA18 TA19 TA20 TA21 TA22 TA23 TA24 TA25 TA26 TA27 TA28 TA29 TA30 TA31 TA32
B TA33 TA34 TA35 TA36 TA37 TA38 TA39 TA40 TA41 TA42 TA43 TA44 TA45 TA46 TA47 TA48
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