March 18th 2022

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Revision as of 10:01, 18 March 2022 by Camsonne (Talk | contribs)

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  • Updates
    • HCal
      • turned back electronics
      • meeting with data science group for ML - VETROC
      • 2 VETROC for HCAL + TDC
      • cable adaptor + cables
      • Clock : VETROC on left - FADC on right side on top crate
      • received fibers
    • CDet
      • got new set of cables and resistors
      • Bogdan order new spare PMTs
      • VETROC
      • cables adaptors
      • one undergrad SULI
      • ADC output for CDet
    • HV
      • Rpi1 - architecture different - VTP OS - Rpi3
      • architecture different
      • new RPI
    • configuration from CODA datafiles
  • Discussion more than 6 samples
  • Helicity, multiple stream
    • replicate data
    • or interleave