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User name R.Michaels/K. Pan
Log entry time 14:32:55 on August15,2009
Entry number 284555
keyword=ROC4 swap, FADC readout update
Today we swapped out ROC4 on the HRS. The new ROC has 500 Mbyte of
memory. The old one had 32 MByte. This seems to make the FADC
readout work for all 8 channels. The FADC memory map is mapped onto
the cpu memory and is approx. 32 MByte, hence we were crashing the
cpu if we read beyond ~6 channels.
The FADC does cause deadtime, however. Below are the tradeoffs.
We'll probably start HAPPEX with the FADC turned off (use_sis3320
flag = 0).
Condition ... DT .... %DT at 100 Hz
No FADC ..... 125 usec .... ca 1 %
60 samples .. 492 usec ..... 5%
100 ......... 712 usec ..... 7%
512 ......... 3 msec (!) ... 30%
Whether we install the FADC on the other HRS is iffy. I need to
find the "V2" FADC. Another FADC is on order but hasn't arrived yet.
Should arrive before PVDIS though.
Running with <= 100 samples is problematic. The signal jumps around
in the window. With 512 samples the picture is stable at the +/-
40 nsec level. This is not understood yet.
How to put a signal in: Run the DAQ with your favorite trigger
and look at the scope for the FADC stop. Put your signal within
approx 500 nsec of this stop. Should work.