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    User name yez

    Log entry time 12:54:27 on February 24, 2011

    Entry number 348439

    This entry is a followup to: 348428

    keyword=L-HRS: reduce the delay value of L1A in LHRS. It still not enough but

    After talking with Vince, I changed the delay value of L1A at LHRS.
    However, as you can see, there is only 24ns delay on L1A and currently it
    comes 70ns later than retimg singals. Even I set it to 0 (actually it
    still has 8ns delay from the module), L1A still comes 50ns late, which
    means that the retiming signal can not determine the gate anymore. More
    importantly, the leading edge of gate signal moves 50ns closer to the
    leading edge of ADC signals, while the orginal design of timing is that
    the ADC signal comes about 50ns later than the gate (the real value could
    be a little bit diffrent since we estimate the delay values causing by
    cables from TM to Fast Bus), so now ADC peaks are all very close the the
    edge of the gate or part of them are already out of gate. Even thought we
    really don't care about the ADC of S1,S2m, we should look at the Pion
    Rejectors to see whether they function normally to seperate electrons and
    pions or not.
    #       Delay Strobel and L1A for retiming
    #                                              -L1A-
    #	Ldelay1  	128 128 128 128 56 8 8 8 24 8 8 120 128 128 128 128   
    #       Reduc the delay of L1A --Zhihong Ye 02/24/2011               
    	Ldelay1  	128 128 128 128 56 8 8 8 0 8 8 120 128 128 128 128   
    Some one commened out the delay of L1A on R-HRS. I don't know why.
    #       Delay Strobe and L1A for retiming
    #                                              -L1A-
    #        Rdelay2	        128 128 128 128 16 8 8 8 8 8 8 88 128 128 128 128

    A copy of this log entry has been emailed to: rom@jlab.org, vasulk@jlab.org,eip@jlab.org,doug@jlab.org,danez@jlab.org, kalyan@jlab.org