Difference between revisions of "FADC DAQ"

From Hall A Wiki
Jump to: navigation, search
(CODA Startup)
(Literature)
 
(6 intermediate revisions by the same user not shown)
Line 27: Line 27:
 
*FADC parameters.
 
*FADC parameters.
 
  There is configuration file with settable parameters for FADC.
 
  There is configuration file with settable parameters for FADC.
  File is located in directory: ''~moller/crl/FADC/fadc_params.cnf''
+
  File is located in directory:  
 +
''~moller/crl/FADC/fadc_params.cnf''
 
  Parameters from file are loaded to FADC in '''Prestart''' state of CODA.
 
  Parameters from file are loaded to FADC in '''Prestart''' state of CODA.
  
Line 110: Line 111:
 
       (OR), (AND) for inputs and function (NOT) for outputs.
 
       (OR), (AND) for inputs and function (NOT) for outputs.
 
        
 
        
* The programmable registers array(read/write):
+
: The programmable registers array(read/write):
 
       8 registers ( 16 bit) for AND function (every bit is corresponded to one input,  
 
       8 registers ( 16 bit) for AND function (every bit is corresponded to one input,  
 
                             the register number is corresponded to the output number),  
 
                             the register number is corresponded to the output number),  
Line 117: Line 118:
 
       one (8 bit) register for NOT function of output (every bit is corresponded to one output).
 
       one (8 bit) register for NOT function of output (every bit is corresponded to one output).
 
        
 
        
* Scalers array:   
+
: Scalers array:   
 
       8 channel of 32bit counters connected to the corresponded outputs of the PLU.
 
       8 channel of 32bit counters connected to the corresponded outputs of the PLU.
  
Line 126: Line 127:
  
 
*[http://hallaweb.jlab.org/equipment/moller/fadc/FADC_for_HallA_Moller-2009.pdf FADC for Hall A Moller (March 18, 2009)]
 
*[http://hallaweb.jlab.org/equipment/moller/fadc/FADC_for_HallA_Moller-2009.pdf FADC for Hall A Moller (March 18, 2009)]
*[http://hallaweb.jlab.org/equipment/moller/fadc/mfadc_annrev_full.pdf  Moller FADC DAQ Upgrade]
+
*[http://hallaweb.jlab.org/equipment/moller/fadc/mfadc_annrev_full.pdf  Moller FADC DAQ Upgrade 2011]
 +
*[http://hallaweb.jlab.org/equipment/moller/fadc/FADC_DAQ_upgrade_2016v1.pdf  Moller FADC DAQ Upgrade 2016]

Latest revision as of 12:21, 7 February 2017

Return to Moller wiki

Original_Moller_FADC_page(fadc)

Documentation

DAQ

FADC Documentation

CODA Startup

  • FADC CODA is running on hamoller computer under moller account.
To start CODA one can type command:
start_coda_fadc - that fires up the usual set of windows for ET, ER, EB, etc.
For FADC DAQ fadc_moller configuration in CODA RunControl is used.
  • FADC parameters.
There is configuration file with settable parameters for FADC.
File is located in directory: 
~moller/crl/FADC/fadc_params.cnf
Parameters from file are loaded to FADC in Prestart state of CODA.
There is self explained list of FADC parameters from configuration file:
fadc_params.cnf
  • Data stored on hamoller computer to directory: /data1/raw/

Analysis

  • Start ROOT-based analizer
Login to hamoller using moller account and type commands:
cd fadc_analysis/moller_fadc-17Dec2015/ 
bash
source root-setup.sh
cd onlana
analyzer
  
  • To replay data from coda file and create root file type in analyzer (run_number=3475):
 .x replay_test.C(3475)
 This command will create moller_fadc_03475.root root file in directory:
 /data1/ROOTFILES/moller/ 
 
  • To do analysis of all data from one root file type in analyzer (run_number=3475, number_events=-1 (all)):
.x do_analyze.C(3475, -1)
 This command loads file with parameters for analysis:
 analyzer_config.set
 and create root file with results moller_analyzer_results_3475.root in directory:
 /data1/ROOTFILES/moller/analyzer_results/

  • To plot table with results and histograms type ("run_list_3463-3470" - file with list of run numbers):
.x plot_results10.C("run_list_3463_3470")

  • There are two scripts to do analysis in batch mode for list of runs:
 b_replay.sh - creates root files from coda files
 b_analyze.sh - creates root files with results
 These scripts take as argument name of file with list of run numbers to analyze.
 do_run_list.sh - this script generates file  with  list of runs.
To do analysis in batch mode:
# Generate file with list of run numbers (runs from 3470 to 3475):   
 do_run_list.sh  3470 3475
   will create file: /data1/ROOTFILES/moller/analyzer_results/run_list_3470_3475
# to replay:    
 b_replay.sh /data1/ROOTFILES/moller/analyzer_results/run_list_3470_3475
# to analyze:
 b_analyze.sh /data1/ROOTFILES/moller/analyzer_results/run_list_3470_3475
   

Useful tips

Known Issues and Firmware upgrade

  • FDAC deadtime ???:
  The FADC _DATA_ triggers have an intrinsic 100--150ns associated deadtime.
   - We measure gap from 0 to 150ns in the Poisson distributed
     time-between-triggers for production data.  Ed J. can account for 90--100ns
     of that as described below.  We're not sure where the remaining 50ns is coming
     from, but I don't think we care at that level.
  The FADC scaler data (ie. HELicity triggers) do /not/ have this deadtime.
Details are here
  • FADC firmware upgrading
  We considering the possibility to have more counters array and programable logic 
  unit (PLU) on the board of FADC  to programming a single channel coincidence 
  and counting it on the scalers.
  For example:
     sumLS.and.CL2.and.CR2,
     sumLS.and.CL2.and.sumCR, ...  and so on.
  The module type of LeCroy-2365 can be used as prototype for this PLU.
  • Preliminary PLU parameters:
     16 inputs by 8 outputs, with possibility to provide the connection 
     of any inputs to any output through the logic function of
     (OR), (AND) for inputs and function (NOT) for outputs.
     
The programmable registers array(read/write):
      8 registers ( 16 bit) for AND function (every bit is corresponded to one input, 
                            the register number is corresponded to the output number), 
      8 registers ( 16 bit) for OR function (every bit is corresponded to one input, 
                            the register number is corresponded to the output number)
      one (8 bit) register for NOT function of output (every bit is corresponded to one output).
      
Scalers array:
     8 channel of 32bit counters connected to the corresponded outputs of the PLU.


  • Add the possibility to disable generation of "Data trigger" at all and enable only trigger from helicity.

Literature