Difference between revisions of "Spin Flip/Logic Electronics"

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#REDIRECT [[Online Spin Flip#Logic Electronics]]
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<noinclude>
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''This article also serve as part of [[Online Spin Flip|spin flip manual]].''
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</noinclude>
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[[Image:Wiring Diagram.png|thumb|electronical design diagram]]
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[[Image:TimingDiagram.png|thumb|timing of spin flip signal]]
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=== Spin Signal Formation ===
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The [[target]] logic electronics is designed as a standalone system, capable of extracting spin state information from target NMR signal induced during spin flip. The significance of this subsystem is that, in some unexpected case that the target computer should be down, these electronics could still keep a record of target spin information and ensure spin signal to [[DAQ]] is valid.
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As shown in the [[:media:Wiring Diagram.png|electrical diagram]] and [[:media: TimingDiagram.png|timing diagram]],
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* '''Input''' of this subsystem are
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** RF function generator status signal (TTL Logic)
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** Lock-In X channel of NMR (Analog)
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* '''Output''' are
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** 2 NIM logic signal, each stand for on spin state; if both of them is logical ''0'', then it implies the spin state is unknown
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** One scalar read ctrl signal, which output a 100ns NIM logical 1 pulse during each successful spin flip. Now it's mainly used as counting number of flips.
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* '''algorithm''' this electronics is based on, is [[Spin Flip/How to Measure Spin#From Peak Sign of Lock-In X Channel|the spin state of target have a fixed relation with sign of NMR signal]].
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* '''The key component''' is two [http://en.wikipedia.org/wiki/SR_latch#SR_latch Set-Reset Latches] which lock down target state once a flip is confirmed
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=== Spin Signal Distribution ===
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The spin signal will be distributed to DAQ system and
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* Read in by ADC and inserted to each event as target spin flag
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* Form Gates for scalars
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The signal distribution scheme are
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<pre>
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NMR RF Generator--->Target--->Pickup Coil--->Lock-In Amplifier
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      |                                          |
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      |      /------------------------------------|
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      |------|-------------------------------\    |
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      |      |                              |    |
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Main Target Electronics                2nd Target Electronics
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            |    |                              |
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            |    \-------------\                |
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            |                  |                |
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    RHRS Happex DAQ        BigBite ADC-------->LHRS ADC
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                                | 
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              Scalar Gates Generation @ BigBite DAQ
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                                |        |
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                        BigBite Scalars  \---->LHRS Scalars
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</pre>

Latest revision as of 22:48, 13 October 2008

This article also serve as part of spin flip manual.

electronical design diagram
timing of spin flip signal

Spin Signal Formation

The target logic electronics is designed as a standalone system, capable of extracting spin state information from target NMR signal induced during spin flip. The significance of this subsystem is that, in some unexpected case that the target computer should be down, these electronics could still keep a record of target spin information and ensure spin signal to DAQ is valid.

As shown in the electrical diagram and timing diagram,

  • Input of this subsystem are
    • RF function generator status signal (TTL Logic)
    • Lock-In X channel of NMR (Analog)
  • Output are
    • 2 NIM logic signal, each stand for on spin state; if both of them is logical 0, then it implies the spin state is unknown
    • One scalar read ctrl signal, which output a 100ns NIM logical 1 pulse during each successful spin flip. Now it's mainly used as counting number of flips.
  • algorithm this electronics is based on, is the spin state of target have a fixed relation with sign of NMR signal.
  • The key component is two Set-Reset Latches which lock down target state once a flip is confirmed

Spin Signal Distribution

The spin signal will be distributed to DAQ system and

  • Read in by ADC and inserted to each event as target spin flag
  • Form Gates for scalars

The signal distribution scheme are 

NMR RF Generator--->Target--->Pickup Coil--->Lock-In Amplifier
       |                                           |
       |      /------------------------------------|
       |------|-------------------------------\    |
       |      |                               |    |
 Main Target Electronics                2nd Target Electronics
            |     |                               |
            |     \-------------\                 |
            |                   |                 |
    RHRS Happex DAQ        BigBite ADC-------->LHRS ADC
                                |   
              Scalar Gates Generation @ BigBite DAQ
                                |        |
                        BigBite Scalars  \---->LHRS Scalars
Retrieved from "https://hallaweb.jlab.org/wiki/index.php?title=Spin_Flip/Logic_Electronics&oldid=2866"