Difference between revisions of "SBS HCal DAQ"

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Line 9: Line 9:
 
* readout files  
 
* readout files  
  
 +
  /home/daq/git/ti/rol/fadc_list_sd_meriem.c
  
  
Line 54: Line 55:
 
   ./DiagGUI ROCConfigSBS.txt
 
   ./DiagGUI ROCConfigSBS.txt
  
 +
 +
* Making pedestal files
 +
 +
  in /home/daq/git/ti/rol/tools
 +
  run : fadc250peds [output filename]
 +
 +
  copy the output in configuration file which is loaded
 +
  currently hardcode to : /home/daq/git/ti/rol/tools/fadc250/intelsbshcal1.cnf
  
  
 
*Problems
 
*Problems

Revision as of 15:42, 31 July 2017

  • Start CODA
 log into triton
 type : startcoda
 on intelsbshcal1 : ./startroc10
 choose  VTPTestFADC
  • readout files
 /home/daq/git/ti/rol/fadc_list_sd_meriem.c


  • Start and monitor VTP


  • Notes
 hostname VTP : sbsvtp1
 hostname CPU : intelsbshcal1


  • Cold start initialization
 source 
 go to vtp/test directory : execute   ./vtpConfigTest hcalvtp.cnf
  • Sample config file
 VTP_CRATE all
 VTP_FIRMWARE fe_vtp_halla_v7_hcal.bin
 #        slot: 10 13  9 14  8 15  7 16  6 17  5 18  4 19  3 20
 #     payload:  1  2  3  4  5  6  7  8  9 10 11 12 13 14 15 16
 VTP_PAYLOAD_EN  1  1  1  1  1  1  1  1  1  1  1  0  1  0  0  0
 # maximum +/- coincidence (in ns)
 VTP_HCAL_HIT_DT   28
 #threshold in calibrated ADC units
 VTP_HCAL_HIT_EMIN 10
 VTP_CRATE end


  • FADC diagnostic tools
    • start server on intel CPU running the FADCs
 cd diaggui_server
 DiagGuiServer 
    • on triton computer
 cd fe_diaggui
 ./DiagGUI ROCConfigSBS.txt


  • Making pedestal files
 in /home/daq/git/ti/rol/tools
 run : fadc250peds [output filename]
 copy the output in configuration file which is loaded
 currently hardcode to : /home/daq/git/ti/rol/tools/fadc250/intelsbshcal1.cnf


  • Problems