Trigger
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Revision as of 13:03, 26 February 2014 by Nisrael (Talk | contribs) (New page: In preparing the trigger for the Hall A 12 GeV DVCS experiment, some issues have been encountered. Currently, attempts are being made to diagnose the problems with the hope of having them ...)
In preparing the trigger for the Hall A 12 GeV DVCS experiment, some issues have been encountered. Currently, attempts are being made to diagnose the problems with the hope of having them all resolved. Below is a list of the problems along with questions related to these problems.
- The data show that there are ADCs with zeros as a well as incorrect header and filler words (Feb. 26, 2014).
- What is causing these zeros?
- Why is the header word 0xa82aa8aa instead of 0xaaaaaaaa?
- Why are the filler words currently reading 0x07ff07ff instead of 0x03ff03ff?
- What steps are needed to resolve these issues?
- There are 4 LED lights for each FPGA inside the trigger - from left to right, for the 1st FPGA the red LED (D1) is on, for the 2nd FPGA the yellow LED (D6) is on, for the 3rd FPGA the green LED (D11) is on and for the 4th FPGA the red LED(D13) as well as the yellow LED (D15) is on (Feb. 26, 2014).
- What do the lights mean?
- Should there be 4 lights simultaneously in the on state?
- The number of words in the FIFO for 1 event plateaus at 151 words, but according to the trigger manual, we should expect 153 words (Feb. 26 2014).
- Which is correct, 151 or 153?
- If it is indeed supposed to be 153 words, why does it plateau at 151 words?
- In block transfer mode (in addition to the issues with the data without block transfer) the word 0xffffffff is seen thrice, but there is no mention of this word in the documentation (Feb. 26, 2014).
- Why do these words appear?
- How can they be removed?
Norman Israel