Log entry time 15:43:24 on May 10, 2011

Entry number 358826

This entry is a followup to: 358785

Followups:

• 358827 05/10/11 17:46 eip RHRS timing
• 358889 05/10/11 23:52 V. Sulkosky re: R-HRS timing issue (ADC Gate)
• 358927 05/11/11 11:06 yez R-HRS S1&S2 TDC spectra for x>2 data

I rechecked the timing on the right RHS.  All the cabling appears to be 
correct.  I also checked the source of the stops and gates for the TDCs 
and ADCs, respectively.  The TDCs stops have traditionally come from the
back plane of the fastbus crates via thick twin-ax cables.  This is still
true.  The ADCs receive their gates from the front panel inputs.  The 
path for the gates still follow the same cabling used from APEX last 
summer.

I took a series of runs with different configurations.

Run 3397 is from April SRC running on 4He.
Run 4315 is the first carbon run we took on Sunday evening.
Run 4334 is from cosmics taking during Tuesday owl shift
Run 4342 is with the strobe signal unplugged from the retiming module
This causes about a 112 ns shift in timing.
Run 4343 is with the strobe ECL cable inverted before going into the 
retiming module

With the strobe ECL cable flip, the timing peak in S1 for run 3397 from
April and the cosmic run 4343 taken today fall on top of each other.
This seems to indicate that the polarity of the strobe signal was flipped
during SRC and must have gotten flipped back right before or 
during x>2.

For now, I left the strobe ECL polarity flipped.  We will check the 
right arm timing once beam comes back.

RHRS Timing Comparison