Difference between revisions of "Docs"
From Hall A Wiki
| Line 13: | Line 13: | ||
Schematics: | Schematics: | ||
*HV patch panels, J. Annand, A. Clarkson | *HV patch panels, J. Annand, A. Clarkson | ||
| − | *Schematic for LV distributor panel is found in figure 5 of "Original electronics plan" document listed in general documents above | + | *Schematic for LV distributor panel is found in figure 5 of "Original electronics plan" document listed in general documents above |
| + | *Schematic for PMT bases is found in figure 3 of "Original electronics plan" document listed in general documents above | ||
| + | *Schematic of NINO front end cards is found in figure 4 of "Original electronics plan" document listed in general documents above | ||
| − | Manuals/Spec sheets: | + | Manuals/Spec sheets for component: |
| − | *PMTs | + | *Electron Tubes ET9124 SB PMTs |
| − | *Scintillator bars | + | *Eljen EJ200 Scintillator bars |
| + | *DYMAX optical cure epoxy | ||
*CAEN V792 [[https://hallaweb.jlab.org/wiki/images/a/a1/V792_rev18.pdf]] | *CAEN V792 [[https://hallaweb.jlab.org/wiki/images/a/a1/V792_rev18.pdf]] | ||
*CAEN V1190 | *CAEN V1190 | ||
Revision as of 14:51, 8 February 2021
General Documents:
- BigBite Timing hodoscope Technical Specifications (design and performance requirements), J. Annand et al. [[1]]
- Software requirements, R. Montgomery et al. [[2]]
- High voltage and low voltage set up and operation for hodoscope in TEDf with cosmics, J. Annand et al. [[3]]
- Original electronics plan (describes chain from PMT to final VME readout, including high voltage and low voltage)[[4]]
- Scintillator bar and light guide surface roughening tests in Glasgow 2020, R. Montgomery et al. [[5]]
Mapping Documents:
- Updated mapping for cosmics running 2021 currently in preparation
- High voltage and low voltage mapping up to Feb 2019 description (layout OUTDATED, will remove when new mapping uploaded)
- Accompanying high voltage and low voltage mapping up to Feb 2019 excel sheet (layout OUTDATED, will remove when new mapping uploaded)
Schematics:
- HV patch panels, J. Annand, A. Clarkson
- Schematic for LV distributor panel is found in figure 5 of "Original electronics plan" document listed in general documents above
- Schematic for PMT bases is found in figure 3 of "Original electronics plan" document listed in general documents above
- Schematic of NINO front end cards is found in figure 4 of "Original electronics plan" document listed in general documents above
Manuals/Spec sheets for component:
