TDIS Bi-monthly meeting, 2018 March 6

Agenda

Continue with our regular bi-weekly meeting every 1st and 3rd Tuesdays of the month
Steve Wood:
- Concern with the amount of data to be produced regarding saving all that to tape
- Creating many Gb/s would be a problem
- Considering pads occupancies and SBS trigger rates, we may be able to reduce that to ~1 Gb/s (considering we can compact data in 8 bytes/hit/pad)
- Consider doing peak fit in FPGA to reach this compact data structure (according to Ed, ALICE is already doing all peak fitting in FPGA)
Alexander Camsonne:
- Marco could send some events tracks to Jixie to start playing with track identification and fits
Ed Jastrzembsky:
- Working with SAMPA test stand
- Trying to get from Oak Ridge the files/drawings of front end cards, so we can produce ours to test this hardware
- These boards would be very important for debugging the CHIP, and they have a good development already that would be beneficial to us
- Identified two vendors that would produce the boards after we get the files
- They are collaborating, exchanged several emails already and got replies on some other discussions
- Asked Oak Ridge for cadence(?) files also, that would help with debug as well
- USP/Brazil asking for change in specifications of SAMPA chip we would need
- Talked with Fernando Barbosa (JLab) to discuss about changes we would need (shapping time, gain, impedances, etc). He said he is going to help us.
R

11:00 AM, JLab meeting room: CC A110

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